Description
This is the artifact for the paper Automated Invariant Generation for Efficient Deductive Reasoning about Embedded Systems. It contains a version of the VerCors verifier and case studies for verification of SystemC designs. Each case study contains detailed instructions on transforming the SystemC source code to PVL, optimizing the PVL program and encoding properties, generating an invariant with VerCors and verifying the resulting system. All data is available in a prepackaged VM as well as separately in a .zip archive. Both username and password to the VM is "artifact".
Date made available | 30 Jun 2024 |
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Publisher | 4TU.Centre for Research Data |