Computer Architecture Design and Test for Embedded Systems

Research Output 1971 2019

1990
37 Citations (Scopus)
32 Downloads (Pure)

Testability analysis of analog systems

Hemink, G., Hemink, G. J., Meijer, B. W. & Kerkhoff, H. G., 1990, In : IEEE transactions on computer-aided design of integrated circuits and systems. 9, 6, p. 573-583 11 p.

Research output: Contribution to journalArticleAcademicpeer-review

File

The inter processor communication architecture of TUMULT-64

Havinga, P. J. M., Smit, G. J. M. & Jansen, P. G., 1 Nov 1990, 5th international symposium on computer and information sciences, ISCIS V. Nevsehir, Turkije, p. 461-470 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

1989
2 Citations (Scopus)
33 Downloads (Pure)

A knowledge-based approach to VLSI-design in an open CAD-environment

Alberts, L. K., Huijs, C., Mars, N. & Spaanenburg, L., 1989, In : Microprocessing and Microprogramming. 27, 1-5, p. 77-84

Research output: Contribution to journalArticleAcademic

File
2 Citations (Scopus)
133 Downloads (Pure)

A programmable-load CMOS ring oscillator/inverter chain for propagation-delay measurements

Lippe, K., Kerkhoff, H. G., Kloppers, G. & Morskieft, N., 1989, p. 225-226.

Research output: Contribution to conferencePaperAcademic

File
1 Citation (Scopus)
25 Downloads (Pure)

A self-aligned gate definition process with submicron gaps

Warmerdam, L. F. P., Aarnink, A. A. I., Holleman, J. & Wallinga, H., 1989, p. 37-40.

Research output: Contribution to conferencePaperAcademic

File
1 Citation (Scopus)
26 Downloads (Pure)

CRACKER: a general area router based on stepwise reshaping

Gerez, S. H. & Herrmann, O. E., 1989, p. 44-47.

Research output: Contribution to conferencePaperAcademic

File
30 Citations (Scopus)
44 Downloads (Pure)

Design and analysis of CMOS analog signal processing circuits by means of a graphical MOST model

Wallinga, H. & Bult, K., 1989, In : IEEE journal of solid-state circuits. 24, 3, p. 672-680

Research output: Contribution to journalArticleAcademic

File
4 Citations (Scopus)
30 Downloads (Pure)

Design and implementation of a hierarchical testable architecture using the boundary scan standard

van Riessen, R. P., Kerkhoff, H. G. & Kloppenburg, A., 1989, p. 112-118.

Research output: Contribution to conferencePaperAcademic

File
37 Downloads (Pure)

Hardware support for the tumult real-time scheduler

van der Bij, H. C., Smit, G. J. M. & Havinga, P. J. M., 1989, In : Microprocessing and Microprogramming. 27, 1-5, p. 251-257

Research output: Contribution to journalArticleAcademic

File
3 Citations (Scopus)
35 Downloads (Pure)

PACKER: a switchbox router based on conflict elimination by local transformations

Gerez, S. H. & Herrmann, O. E., 1989, p. 961-964.

Research output: Contribution to conferencePaperAcademic

File
13 Citations (Scopus)
45 Downloads (Pure)

Switchbox routing by stepwise reshaping

Gerez, S. H. & Herrmann, O. E., 1989, In : IEEE transactions on computer-aided design of integrated circuits and systems. 8, 12, p. 1350-1361

Research output: Contribution to journalArticleAcademic

File
1988
30 Citations (Scopus)
102 Downloads (Pure)

A CMOS analog continuous-time delay line with adaptive delay-time control

Bult, K. & Wallinga, H., 1988, In : IEEE journal of solid-state circuits. 23, 3, p. 759-766

Research output: Contribution to journalArticleAcademic

File
139 Downloads (Pure)

CMOS circuits for analog signal processing

Wallinga, H., 1988, p. 143-149.

Research output: Contribution to conferencePaperAcademic

File
6 Citations (Scopus)
53 Downloads (Pure)

TASTE: a tool for analog system testability evaluation

Hemink, G. J., Meijer, B. W. & Kerkhoff, H. G., 1988, p. 829-838.

Research output: Contribution to conferencePaperAcademic

File
1 Citation (Scopus)
43 Downloads (Pure)

The communication processor of TUMULT-64

Smit, G. J. M. & Jansen, P. G., 1988, In : Microprocessing and Microprogramming. 24, 1-5, p. 519-524

Research output: Contribution to journalArticleAcademic

File
1987
10 Downloads (Pure)

A CMOS analog continuous-time delay-line

Bult, K. & Wallinga, H., 1987, p. 35-38.

Research output: Contribution to conferencePaperAcademic

File
35 Downloads (Pure)

Proposal for an architecture for TUMULT based on a serial data link

Scholten, J., Hofstede, J. & Smit, G. J. M., 1987, In : Microprocessing and Microprogramming. 21, 1-5, p. 613-619

Research output: Contribution to journalArticleAcademic

File
1986
1 Citation (Scopus)
12 Downloads (Pure)

Analog CMOS computational circuits

Bult, K. & Wallinga, H., 1986, p. 119-121.

Research output: Contribution to conferencePaperAcademic

File
9 Downloads (Pure)

Differential input urrent integrator for charge domain networks

Gal, R. & Wallinga, H., 1986, p. 164-166.

Research output: Contribution to conferencePaperAcademic

File
1985
121 Citations (Scopus)
15 Downloads (Pure)

A four-quadrant CMOS analog multiplier

Bult, K. & Wallinga, H., 1985, p. 296-301.

Research output: Contribution to conferencePaperAcademic

File
35 Downloads (Pure)

Charge loss experiments in surface channel CCD's explained by the McWhorter interface states model

Penning De Vries, R. G. M. & Wallinga, H., 1985, In : Physica B+C. 129, 1-3, p. 301-305

Research output: Contribution to journalArticleAcademic

File
1 Citation (Scopus)
30 Downloads (Pure)

MOD/R : A knowledge assisted approach towards top-down only CMOS VLSI design

Spaanenburg, L., Beunder, M., Beune, F. A., Gerez, S. H., Holstein, B., Luchtmeyer, R. C. C., Smit, J., van der Werf, A. & Willems, H., 1985, In : Microprocessing and Microprogramming. 16, 2-3, p. 83-88

Research output: Contribution to journalArticleAcademic

File
1984
4 Citations (Scopus)
5 Downloads (Pure)

Twentenet: A LAN with message priorities, design and performance considerations

Niemegeers, I. G. M. M. & Vissers, C. A., 1984, p. 178-185.

Research output: Contribution to conferencePaperAcademic

File
1983
8 Downloads (Pure)

Charge domain filter operating up to 20 MHz clock frequency

Gal, R. A. J. & Wallinga, H., 1983, p. 45-48.

Research output: Contribution to conferencePaperAcademic

File
1982
2 Citations (Scopus)
54 Downloads (Pure)

An area-variable MOS varicap and its application in programmable TAP weighting of CCD transversal filters

Bhattacharyya, A. B. & Wallinga, H., 1982, In : IEEE transactions on electron devices. 29, 5, p. 827-833

Research output: Contribution to journalArticleAcademic

File
1981
46 Downloads (Pure)

Performance of an area variable MOS varicap weighted programmable CCD transversal filter

Bhattacharyya, A. B., Shankarnarayan, L., Kapur, N. & Wallinga, H., 1981, In : Electronics letters. 17, 13, p. 467-468

Research output: Contribution to journalArticleAcademic

File
1979
253 Citations (Scopus)
115 Downloads (Pure)

A class of analog CMOS circuits based on the square-law characteristic of an MOS transistor in saturation

Bult, K. & Wallinga, H., 1979, In : IEEE journal of solid-state circuits. 22, 3, p. 357-365

Research output: Contribution to journalArticleAcademic

File
97 Citations (Scopus)
183 Downloads (Pure)

A CMOS four-quadrant analog multiplier

Bult, K. & Wallinga, H., 1979, In : IEEE journal of solid-state circuits. 21, 3, p. 430-435

Research output: Contribution to journalArticleAcademic

File
4 Citations (Scopus)
28 Downloads (Pure)

A general model for the frequency response of multiphase charge transfer delay lines

Wallinga, H., 1979, In : IEEE journal of solid-state circuits. 14, 3, p. 653-655

Research output: Contribution to journalArticleAcademic

File
5 Citations (Scopus)
28 Downloads (Pure)

An electrically programmable CCD transversal filter with variable capacitance weight factors

Wallinga, H. & Hylkema, I., 1979, In : IEEE journal of solid-state circuits. 14, 3, p. 538-542

Research output: Contribution to journalArticleAcademic

File
1 Citation (Scopus)
30 Downloads (Pure)

An Electrically Programmable Split-Electrode Charge-Coupled Transversal Filter (EPSEF)

Wallinga, H. & Pelgrom, M. J. M., 1979, In : IEEE journal of solid-state circuits. 15, 5, p. 899-907

Research output: Contribution to journalArticleAcademic

File
1978
10 Downloads (Pure)

Analysis of tap weight errors in CCD transversal filters

Ricco, B. & Wallinga, H., 1978, p. 89-91.

Research output: Contribution to conferencePaperAcademic

File
22 Downloads (Pure)

An electrically programmable CCD transversal filter with variable capacitance weight factors

Wallinga, H. & Hylkema, I. C., 1978, p. 85-88.

Research output: Contribution to conferencePaperAcademic

File
1976
5 Citations (Scopus)
31 Downloads (Pure)

Interface, a dispersed architecture

Vissers, C. A., 1976, In : SIGARCH Computer Architecture News. 4, 4, p. 98-104

Research output: Contribution to journalArticleAcademic

File
1974
40 Downloads (Pure)

Diagnostic analysis of the charge transfer in CCDs

Wallinga, H. & van Ruyven, H. L. M., 1974, p. 148-149.

Research output: Contribution to conferencePaperAcademic

File
1971
3 Citations (Scopus)
34 Downloads (Pure)

A method for the measurement of the turn-on condition in MOS transistors

Wallinga, H., 1971, In : Solid-state electronics. 14, 11, p. 1093-1098

Research output: Contribution to journalArticleAcademic

Open Access
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silicon transistors
Silicon oxides
metal oxides
Transistors
Metals