Computer Architecture Design and Test for Embedded Systems

Research Output 1971 2019

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Paper
1989
4 Citations (Scopus)
34 Downloads (Pure)

Design and implementation of a hierarchical testable architecture using the boundary scan standard

van Riessen, R. P., Kerkhoff, H. G. & Kloppenburg, A., 1989, p. 112-118.

Research output: Contribution to conferencePaperAcademic

File
3 Citations (Scopus)
41 Downloads (Pure)

PACKER: a switchbox router based on conflict elimination by local transformations

Gerez, S. H. & Herrmann, O. E., 1989, p. 961-964.

Research output: Contribution to conferencePaperAcademic

File
1988
155 Downloads (Pure)

CMOS circuits for analog signal processing

Wallinga, H., 1988, p. 143-149.

Research output: Contribution to conferencePaperAcademic

File
6 Citations (Scopus)
58 Downloads (Pure)

TASTE: a tool for analog system testability evaluation

Hemink, G. J., Meijer, B. W. & Kerkhoff, H. G., 1988, p. 829-838.

Research output: Contribution to conferencePaperAcademic

File
1987
12 Downloads (Pure)

A CMOS analog continuous-time delay-line

Bult, K. & Wallinga, H., 1987, p. 35-38.

Research output: Contribution to conferencePaperAcademic

File
1986
1 Citation (Scopus)
12 Downloads (Pure)

Analog CMOS computational circuits

Bult, K. & Wallinga, H., 1986, p. 119-121.

Research output: Contribution to conferencePaperAcademic

File
11 Downloads (Pure)

Differential input urrent integrator for charge domain networks

Gal, R. & Wallinga, H., 1986, p. 164-166.

Research output: Contribution to conferencePaperAcademic

File
1985
121 Citations (Scopus)
17 Downloads (Pure)

A four-quadrant CMOS analog multiplier

Bult, K. & Wallinga, H., 1985, p. 296-301.

Research output: Contribution to conferencePaperAcademic

File
1984
4 Citations (Scopus)
6 Downloads (Pure)

Twentenet: A LAN with message priorities, design and performance considerations

Niemegeers, I. G. M. M. & Vissers, C. A., 1984, p. 178-185.

Research output: Contribution to conferencePaperAcademic

File
1983
12 Downloads (Pure)

Charge domain filter operating up to 20 MHz clock frequency

Gal, R. A. J. & Wallinga, H., 1983, p. 45-48.

Research output: Contribution to conferencePaperAcademic

File
1978
12 Downloads (Pure)

Analysis of tap weight errors in CCD transversal filters

Ricco, B. & Wallinga, H., 1978, p. 89-91.

Research output: Contribution to conferencePaperAcademic

File
26 Downloads (Pure)

An electrically programmable CCD transversal filter with variable capacitance weight factors

Wallinga, H. & Hylkema, I. C., 1978, p. 85-88.

Research output: Contribution to conferencePaperAcademic

File
1974
44 Downloads (Pure)

Diagnostic analysis of the charge transfer in CCDs

Wallinga, H. & van Ruyven, H. L. M., 1974, p. 148-149.

Research output: Contribution to conferencePaperAcademic

File