Anne J. Annema

Research output

Research output per year 1990 2001 2004 2017 2018 2024

• 60 Conference contribution
• 47 Article
• 32 Patent
• 5 Poster
• 12 More
  • 3 Other contribution
  • 2 Book
  • 2 Paper
  • 1 Chapter
  • 1 Abstract
  • 1 Other
  • 1 Conference article
  • 1 PhD Thesis - Research UT, graduation UT

Research output per year

Research output per year

Search results

• 2023

  Tapered Multipath Inductors

  Hoen, T. J. (Inventor), Jin, Y. (Inventor), Annema, A. J. (Inventor) & Verlinden, J. (Inventor), 10 Oct 2023, Patent No. US 11,783,990 B1, 30 Mar 2022, Priority No. 17/657,173

  Research output: Patent

  Open Access

  File

  • Multipath 100%
  • Inductor 100%
  • Metal 100%
  • Output Terminal 40%
  • Input Terminal 40%
  41 Downloads (Pure)

• TAPERED MULTIPATH INDUCTORS

  Hoen, T. J. (Inventor), Jin, Y. (Inventor), Annema, A. J. (Inventor) & Verlinden, J. (Inventor), 5 Oct 2023, Patent No. US20230317347A1, Priority date 30 Mar 2022, Priority No. US202217657173A

  Research output: Patent

  Open Access

  • Multipath 100%
  • Inductor 100%
  • Metal 100%
  • Output Terminal 40%
  • Input Terminal 40%
• 2021

  Frequency reference generator

  Delke, A. S. (Inventor), Oude Alink, M. S. (Inventor), Annema, A. J. (Inventor), Jin, Y. (Inventor), Verlinde, J. (Inventor) & Nauta, B. (Inventor), 25 May 2021, NXP bv Eindhoven, Patent No. US 11,018,625 B1, Priority date 28 Feb 2020, Priority No. 16 / 804,245

  Research output: Patent

  Open Access

  File

  • Frequency Reference 100%
  • Generators 100%
  • Temperature 100%
  • Measured Temperature 75%
  • Drives 50%
  79 Downloads (Pure)
• 2006

  A digital to analog converter

  Westra, J. R. (Inventor) & Annema, A. J. (Inventor), 27 Sept 2006, (Accepted/In press) Patent No. EP1142122

  Research output: Patent

  File
  152 Downloads (Pure)

• Digital to Analog Converter

  Westra, J. R. (Inventor), Annema, A. J. (Inventor), van den Boom, J. M. (Inventor) & Dijkmans, E. C. (Inventor), 29 Mar 2006, (Accepted/In press) Patent No. EP1382123

  Research output: Patent

  File
  196 Downloads (Pure)
• 2003

  Circuit for providing a constant current

  Widdershoven, F. P. (Inventor) & Annema, A. J. (Inventor), 6 May 2003, Patent No. US 6559711, Priority date 6 May 2003

  Research output: Patent

  Open Access

  File
  16 Downloads (Pure)

• Circuit for providing a constant current

  Widdershoven, F. P. (Inventor) & Annema, A. J. (Inventor), 24 Apr 2003, Patent No. EP1303801 (A2), Priority date 24 Apr 2003

  Research output: Patent

  Open Access

  • Value 100%
  • Electronic Circuit 100%
  • Capacitor 100%
  • Temperature 60%
  • Electric Potential 40%
• 2002

  A Low Noise Electronic Circuit

  Annema, A. J. (Inventor), Leenaerts, D. M. W. (Inventor) & de Vreede, P. W. H. (Inventor), 26 Nov 2002, (Submitted) Patent No. WO2002IB05024, Priority date 12 Jun 2003

  Research output: Patent

  File
  53 Downloads (Pure)

• Circuit for providing a constant current

  Widdershoven, F. P. (Inventor) & Annema, A. J. (Inventor), 7 Feb 2002, Patent No. US2002014910 (A1), Priority date 7 Feb 2002

  Research output: Patent

  Open Access

  File

  • Value 100%
  • Electronic Circuit 100%
  • Capacitor 100%
  • Temperature 60%
  • Electric Potential 40%
  35 Downloads (Pure)

• Circuit for providing a constant current

  Widdershoven, F. P. (Inventor) & Annema, A. J. (Inventor), 17 Jan 2002, Patent No. WO0205053 (A2), Priority date 17 Jan 2002

  Research output: Patent

  Open Access

  File

  • Value 100%
  • Electronic Circuit 100%
  • Capacitor 100%
  • Temperature 60%
  • Electric Potential 40%
  15 Downloads (Pure)

• D/A converter with Multibit Input

  Annema, A. J. (Inventor) & Westra, J. R. (Inventor), 30 Jul 2002, (Submitted) Patent No. US 6, 426,715, Priority date 30 Jul 2002

  Research output: Patent

• Digital-to-Analog Converter

  Westra, J. R. (Inventor), Annema, A. J. (Inventor), van de Boom, J. M. (Inventor) & Dijkmans, E. C. (Inventor), 4 Apr 2002, (In preparation) Patent No. WO0227941, Priority date 4 Apr 2002

  Research output: Patent

• Level Converter provided with slew-rate controlling means

  Annema, A. J. (Inventor), 30 Apr 2002, (Submitted) Patent No. US6380761, Priority date 30 Apr 2002

  Research output: Patent

• 2001

  A High-Voltage Level Tolerant Transistor Circuit

  Annema, A. J. (Inventor) & Geelen, G. J. G. M. (Inventor), 20 Nov 2001, Patent No. US6320414B1

  Research output: Patent

  Open Access

  File

  • Transistor 100%
  • Electronic Circuit 100%
  • Transistor Circuit 100%
  • Node Level 50%
  • Biasing Circuit 16%
  62 Downloads (Pure)

• A High-Voltage Level Tolerant Transistor Circuit

  Annema, A. J. (Inventor) & Geelen, G. J. G. M. (Inventor), 16 May 2001, Patent No. EP1099306, Priority date 16 May 2001

  Research output: Patent

  Open Access

  • Networks (Circuits) 100%
  • High Voltage 100%
  • Transistor Circuit 100%
  • Transistor 100%
  • Electronic Circuit 100%

• A Level Converter provided with Slew-Rate Controlling Means

  Annema, A. J. (Inventor), 23 May 2001, Patent No. EP1101286, Priority date 23 May 2001

  Research output: Patent

  Open Access

  File
  28 Downloads (Pure)

• An Integrated Circuit Provided with a Fail-Safe Mode

  Annema, A. J. (Inventor) & Geelen, G. J. G. M. (Inventor), 16 Oct 2001, Patent No. US6304112, Priority date 16 Oct 2001

  Research output: Patent

  Open Access

  File

  • Integrated Circuit 100%
  • Output 100%
  • Electric Potential 100%
  • Control 71%
  • Supply Voltage 57%
  31 Downloads (Pure)

• An Integrated Circuit Provided with a Fail-Safe Mode

  Annema, A. J. (Inventor) & Geelen, G. J. G. M. (Inventor), 15 Feb 2001, Koninklijke Philips Electronics N.V., Patent No. WO-00111777, 31 Jul 2001, Priority date 10 Aug 1999

  Research output: Patent

  Open Access

  File
  12 Downloads (Pure)

• D/A Converter with Multibit Input

  Annema, A. J. (Inventor) & Westra, J. R. (Inventor), 3 May 2001, (In preparation) Patent No. WO0131793, Priority date 3 May 2001

  Research output: Patent

• D/A Converter with Multibit Input

  Annema, A. J. (Inventor) & Westra, J. R. (Inventor), 10 Oct 2001, (In preparation) Patent No. EP1142122, Priority date 10 Oct 2001

  Research output: Patent

• Digital to Analog Converter

  Westra, J. R. (Inventor), Annema, A. J. (Inventor), van den Boom, J. M. (Inventor) & Dijkmans, E. C. (Inventor), 14 Aug 2001, (Submitted) Patent No. WO2001EP10662, Priority date 4 Apr 2002

  Research output: Patent

  File
  104 Downloads (Pure)

• High Voltage Level Tolerant Transistor Circuit

  Annema, A. J. (Inventor) & Geelen, G. J. G. M. (Inventor), 20 Nov 2001, (Submitted) Patent No. US6320414, Priority date 20 Nov 2001

  Research output: Patent

• Integrated Circuit with a Non-Volatile MOS RAM Cell

  Pelgrom, M. J. M. (Inventor), Widdershoven, F. P. (Inventor), Annema, A. J. (Inventor) & Storms, M. (Inventor), 10 Oct 2001, (In preparation) Patent No. EP1141961, Priority date 10 Oct 2001

  Research output: Patent

• Integrated Circuit with a Non-Volatile MOS RAM Cell

  Widdershoven, F. P. (Inventor), Annema, A. J. (Inventor), Storms, M. (Inventor) & Pelgrom, M. J. M. (Inventor), 12 Apr 2001, (In preparation) Patent No. WO-0126113, Priority date 12 Apr 2001

  Research output: Patent

• Non-volatile MOS RAM cell with capacitor-isolated nodes that are radiation accessible for rendering a non-permanance programmes information in the cell of a non-volatile one

  Pelgrom, M. J. M. (Inventor), Widdershoven, F. P. (Inventor), Annema, A. J. (Inventor) & Storms, M. (Inventor), 18 Dec 2001, (Submitted) Patent No. US 6331947, Priority date 18 Dec 2001

  Research output: Patent

• Non-volatile MOS RAM cell with capacitor-isolated nodes that are radiation accessible for rendering a non-permanent programmed information in the cell of a non-volatile one

  Widdershoven, F. P. (Inventor), Annema, A. J. (Inventor), Storms, M. M. N. (Inventor) & Pelgrom, M. J. M. (Inventor), 18 Dec 2001, (Accepted/In press) Patent No. US6,331,947

  Research output: Patent

  File

  • Nonvolatile 100%
  • Rendering 100%
  • Capacitor 100%
  • Information 100%
  • Electrodes 75%
  38 Downloads (Pure)
• 2000

  A digital to analog converter

  Westra, J. R. (Inventor) & Annema, A. J. (Inventor), 9 Oct 2000, (Submitted) Patent No. WO2000EP09952, Priority date 21 Jan 2004

  Research output: Patent

  File
  83 Downloads (Pure)

• A High Voltage Digital-to-Analog Converter

  Westra, J. R. (Inventor), Annema, A. J. (Inventor), van de Boom, J. M. (Inventor) & Dijkmans, E. C. (Inventor), 27 Sept 2000, (In preparation) Patent No. EP00203337.1, Priority date 27 Sept 2000

  Research output: Patent

• A high-voltage level tolerant transistor circuit

  Annema, A. J. (Inventor) & Geelen, G. J. G. M. (Inventor), 23 Nov 2000, Patent No. WO2000070763A1, Priority date 23 Nov 2000

  Research output: Patent

  Open Access

  File

  • Networks (Circuits) 100%
  • High Voltage 100%
  • Transistor Circuit 100%
  • Transistor 100%
  • Electronic Circuit 100%
  18 Downloads (Pure)

• A level converter provided with slew-rate controlling means

  Annema, A. J. (Inventor), 7 Dec 2000, Patent No. WO0074239, Priority date 7 Dec 2000

  Research output: Patent

  Open Access

  File

  • Rate 100%
  • Electric Potential 100%
  • Capacitor 100%
  • Bias 100%
  • Amplifier 66%
  34 Downloads (Pure)

• Reference voltage source with temperature-compensated output reference voltage.

  Annema, A. J. (Inventor), 26 Sept 2000, (Submitted) Patent No. US 6124704, Priority date 26 Sept 2000

  Research output: Patent

• 1999

  Band-gap refence voltage source

  Annema, A. J. (Inventor), 24 Aug 1999, Patent No. US 5942887 (A), Priority date 8 Nov 1996, Priority No. EP19960203137 19961108

  Research output: Patent

  Open Access

  File
  48 Downloads (Pure)