Research Output 1998 2018

6 Citations

Counterexample Guided Path Reduction for Static Program Analysis

Fehnker, A., Huuck, R. & Seefried, S. 2010 Concurrency, Compositionality, and Correctness: Essays in Honor of Willem-Paul de Roever. Dams, D., Hannemann, U. & Steffen, M. (eds.). Springer, Vol. 5930, p. 322-341 20 p. (Lecture Notes in Computer Science)

Research output: Scientific - peer-reviewChapter

11 Citations

Graphical Modelling for Simulation and Formal Analysis of Wireless Network Protocols

Fehnker, A., Fruth, M. & McIver, A. 2009 Methods, Models and Tools for Fault Tolerance. Butler, M., Jones, C., Romanovsky, A. & Troubitsyna, E. (eds.). Berlin: Springer, p. 1-24 24 p. (Lecture Notes in Computer Science; vol. 5454)

Research output: Scientific - peer-reviewChapter

Model checking
Telecommunication links
Wireless networks

Temporal Logic Model Checking

Clarke, E. M., Fehnker, A., Jha, S. K. & Veith, H. 2005 Handbook of Networked and Embedded Control Systems. Hristu-Varsakelis, D. & Levine, W. S. (eds.). Birkhäuser, p. 539-558 20 p. (Control engineering)

Research output: Scientific - peer-reviewChapter

Temporal logic
Model checking
81 Citations

As Cheap as Possible:Efficient Cost-Optimal Reachability for Priced Timed Automata

Larsen, K. G., Behrmann, G., Brinksma, E., Fehnker, A., Hune, T., Petterson, P., Romijn, J. M. T. & Romijn, J. 2001 Computer Aided Verification: 13th International Conference, CAV 2001 Paris, France, July 18–22, 2001 Proceedings. Berry, G., Comon, H. & Finkel, A. (eds.). Heidelberg: Springer, Vol. 2102, p. 493-505 13 p. (Lecture Notes in Computer Science; no. 2102)

Research output: Scientific - peer-reviewChapter