Calculated based on number of publications stored in Pure and citations from Scopus
1989 …2025

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  • 2023

    Apparatus comprising a local oscillator for driving a mixer

    Dodangeh, M. (Inventor), Oude Alink, M. S. (Inventor) & Nauta, B. (Inventor), 18 May 2023, Patent No. US 2023/0155552 A1, 4 Nov 2022, Priority date 12 Nov 2021, Priority No. (GB) 2116291.2

    Research output: Patent

    Open Access
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    130 Downloads (Pure)
  • 2022

    An apparatus comprising a local oscillator for driving a mixer

    Dodangeh, M. (Inventor), Oude Alink, M. S. (Inventor) & Nauta, B. (Inventor), 13 Apr 2022, Patent No. GB2599809_A, 12 Nov 2021, Priority No. GB20210016291 20211112

    Research output: Patent

    Open Access
    File
    100 Downloads (Pure)
  • 2021

    Frequency reference generator

    Delke, A. S. (Inventor), Oude Alink, M. S. (Inventor), Annema, A. J. (Inventor), Jin, Y. (Inventor), Verlinde, J. (Inventor) & Nauta, B. (Inventor), 25 May 2021, NXP bv Eindhoven, Patent No. US 11,018,625 B1, Priority date 28 Feb 2020, Priority No. 16 / 804,245

    Research output: Patent

    Open Access
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    81 Downloads (Pure)
  • Systems and methods for analog finite impulse response filters

    Thijssen, B. J. (Inventor), Klumperink, E. A. M. (Inventor), Quinlan, P. (Inventor) & Nauta, B. (Inventor), 26 Jan 2021, Analog Devices International, Patent No. US10903820 (B2), Priority date 2 Apr 2020, Priority No. 16/838,250

    Research output: Patent

    Open Access
    File
    138 Downloads (Pure)
  • 2020

    Systems and methods for analog finite impulse response filters

    Thijssen, B. J. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Quinlan, P. (Inventor), 8 Oct 2020, Patent No. US2020321943 (A1), Priority date 2 Apr 2020, Priority No. US202016838250 20200402

    Research output: Patent

    Open Access
  • 2019

    Feedforward phase noise compensation

    Thijssen, B. J. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Quinlan, P. (Inventor), 14 May 2019, Patent No. US 10291214 B2, 27 Feb 2018, Priority date 27 Feb 2018, Priority No. US201762465717P 20170301

    Research output: Patent

    Open Access
    File
    46 Downloads (Pure)
  • 2018

    Feedforward phase noise compensation

    Thijssen, B. J. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Quinlan, P. (Inventor), 7 Sept 2018, Patent No. WO2018160569 (A1), Priority date 27 Feb 2018, Priority No. US201762465717P 20170301

    Research output: Patent

    Open Access
    File
    64 Downloads (Pure)
  • System for parallel radio reception with digitally controlled analog mixer amplifiers

    Nauta, B. (Inventor), Kasri, R. (Inventor), Klumperink, E. A. M. (Inventor), Cathelin, P. (Inventor) & Tournier, E. (Inventor), 11 May 2018, Patent No. WO2018083387 A1, Priority date 3 Nov 2016, Priority No. WO2016FR52854 20161103

    Research output: Patent

    Open Access
    File
    54 Downloads (Pure)
  • Wireless communication receiver

    Lien, Y.-C. (Inventor), Klumperink, E. A. M. (Inventor) & Nauta, B. (Inventor), 24 Jul 2018, Patent No. US10033420 B2, Priority date 23 Jun 2016, Priority No. US201662353587P 20160623

    Research output: Patent

    Open Access
    File
    67 Downloads (Pure)
  • 2017

    Wireless communication receiver

    Lien, Y.-C. (Inventor), Klumperink, E. A. M. (Inventor) & Nauta, B. (Inventor), 28 Dec 2017, Patent No. US2017373710 (A1), Priority date 23 Jun 2016, Priority No. US201715469690 20170327

    Research output: Patent

    Open Access
    File
    2 Citations (Scopus)
    193 Downloads (Pure)
  • Wireless receiver with high linearity

    Lien, Y.-C. (Inventor), Tenbroek, B. M. (Inventor), Klumperink, E. A. M. (Inventor) & Nauta, B. (Inventor), 27 Jun 2017, Patent No. US9692471 B2, Priority date 20 Jan 2016

    Research output: Patent

    Open Access
    File
    130 Downloads (Pure)
  • 2016

    Current source array

    Cathelin, A. (Inventor) & Nauta, B. (Inventor), 27 Sept 2016, Patent No. US9455689B2, Priority date 19 Nov 2014, Priority No. FR20130061410 20131120

    Research output: Patent

    File
    179 Downloads (Pure)
  • Frequency Synthesiser

    Drago, S. (Inventor), Sebastiano, F. (Inventor), Leenaerts, D. M. W. (Inventor), Breems, L. J. (Inventor) & Nauta, B. (Inventor), 19 Jan 2016, Patent No. US 9240772 (B2), Priority date 3 Apr 2009, Priority No. EP20090157284 20090403

    Research output: Patent

    Open Access
    File
    37 Downloads (Pure)
  • Method and circuitry for CMOS transconductor linearization

    Kundur Subramaniyan, H. (Inventor), Klumperink, E. A. M. (Inventor), Srinivasan, V. (Inventor), Kiaei, A. (Inventor) & Nauta, B. (Inventor), 27 Dec 2016, Patent No. US9531335 (B2), Priority date 5 Aug 2015

    Research output: Patent

    Open Access
    File
    103 Downloads (Pure)
  • Method and circuitry for CMOS transconductor linearization

    Kundur Subramaniyan, H. (Inventor), Klumperink, E. A. M. (Inventor), Srinivasan, V. (Inventor), Kiaei, A. (Inventor) & Nauta, B. (Inventor), 12 May 2016, Patent No. US2016/0134240 A1, Priority date 12 May 2016

    Research output: Patent

    File
    83 Downloads (Pure)
  • Wireless receiver with high linearity

    Lien, Y.-C. (Inventor), Tenbroek, B. M. (Inventor), Klumperink, E. A. M. (Inventor) & Nauta, B. (Inventor), 21 Jul 2016, Patent No. US2016/0211873 A1, Priority date 20 Jan 2016

    Research output: Patent

    File
    139 Downloads (Pure)
  • 2015

    Current source array

    Cathelin, A. (Inventor) & Nauta, B. (Inventor), 21 May 2015, Patent No. US20150137874 A1

    Research output: Patent

    File
    151 Downloads (Pure)
  • Power amplifier circuit

    Takeya, H. (Inventor) & Nauta, B. (Inventor), 24 Nov 2015, Patent No. JP2015211393 (A), Priority date 24 Nov 2015

    Research output: Patent

    Open Access
    File
    81 Downloads (Pure)
  • Procede de conversion d'un signal analogique en un signal numerique et convertisseur analogique/numerique correspondant

    Cathelin, A. (Inventor), Nauta, B. (Inventor), Letual, S. (Inventor) & Franck, A. (Inventor), 22 May 2015, Patent No. FR3013505 (A1), Priority date 20 Nov 2013, Priority No. FR20130061411 20131120

    Research output: Patent

    Open Access
    File
    111 Downloads (Pure)
  • 2014

    Attenuator

    Tokumasa, H. (Inventor) & Nauta, B. (Inventor), 25 Dec 2014, Patent No. JP2014241554 (A), Priority date 10 Jul 2013, Priority No. JP20130124020 20130612

    Research output: Patent

    Open Access
    File
    6 Downloads (Pure)
  • Attenuator

    Tokumasa, H. (Inventor) & Nauta, B. (Inventor), 25 Dec 2014, Patent No. JP2014241555A, Priority date 10 Jul 2013

    Research output: Patent

    File
    39 Downloads (Pure)
  • Direct RF Modulation Transmitter

    Fukuda, S. (Inventor) & Nauta, B. (Inventor), 16 Jul 2014, Patent No. JP5551663 (B2), Priority date 30 Aug 2011, Priority No. JP20110187410 20110830

    Research output: Patent

    Open Access
    File
    97 Downloads (Pure)
  • Direct RF modulation transmitter, sampling clock frequency setting method for direct RF modulation transmitter

    Fukuda, S. (Inventor) & Nauta, B. (Inventor), 3 Sept 2014, Patent No. JP5584180(B2), Priority date 3 Aug 2011, Priority No. JP20110170347 20110803

    Research output: Patent

  • 2013

    Direct RF modulation transmitter

    Fukuda, S. (Inventor) & Nauta, B. (Inventor), 14 Mar 2013, Patent No. JP2013051494

    Research output: Patent

    File
    58 Downloads (Pure)
  • Direct RF modulation transmitter, sampling clock frequency setting method for direct RF modulation transmitter

    Fukuda, S. (Inventor) & Nauta, B. (Inventor), 21 Feb 2013, Patent No. JP2013038461 (A), Priority No. JP20110170347 20110803

    Research output: Patent

    File
    55 Downloads (Pure)
  • Distortion compensator

    Sakamoto, K. (Inventor) & Nauta, B. (Inventor), 10 Jun 2013, Patent No. JP2013115725 (A), Priority date 31 Jan 2012

    Research output: Patent

    File
    33 Downloads (Pure)
  • Distortion Compensator

    Sakamoto, K. (Inventor) & Nauta, B. (Inventor), 4 Jul 2013, Patent No. JP2013132009 (A), Priority date 22 Dec 2011, Priority No. JP20110281966 20111222

    Research output: Patent

    File
    27 Downloads (Pure)
  • Distortion Compensator

    Sakamoto, K. (Inventor) & Nauta, B. (Inventor), 13 Jun 2013, Patent No. JP2013118577 (A), Priority date 31 Jan 2012

    Research output: Patent

    File
    50 Downloads (Pure)
  • Low power and low spur sampling PLL

    Gao, X. (Inventor), Bahai, A. (Inventor), Bohsali, M. (Inventor), Djabbari, A. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Socci, G. (Inventor), 12 Mar 2013, Patent No. US8395427 B1, Priority date 20 Dec 2010, Priority No. 12/973,323

    Research output: Patent

    File
    58 Downloads (Pure)
  • Polyphase harmonic rejection mixer

    Ru, Z. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Brekelmans, J. H. A. (Inventor), 10 Dec 2013, Patent No. US8606210 (B2), Priority date 12 Aug 2010

    Research output: Patent

    File
    336 Downloads (Pure)
  • Sampling phase lock loop (PLL) with low power clock buffer

    Gao, X. (Inventor), Bahai, A. (Inventor), Bohsali, M. (Inventor), Djabbari, A. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Socci, G. (Inventor), 14 Feb 2013, Patent No. US 2013/0038365 A1, Priority date 17 Oct 2012

    Research output: Patent

    File
    28 Downloads (Pure)
  • Sampling phase lock loop (PLL) with low power clock buffer

    Gao, X. (Inventor), Bahai, A. (Inventor), Bohsali, M. (Inventor), Djabbari, A. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Socci, G. (Inventor), 23 Apr 2013, Patent No. US8427209B2, Priority date 20 Dec 2010

    Research output: Patent

    File
    99 Downloads (Pure)
  • Spur reduction technique for sampling PLLs

    Gao, X. (Inventor), Bahai, A. (Inventor), Bohsali, M. (Inventor), Djabbari, A. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Socci, G. (Inventor), 12 Feb 2013, Patent No. US8373481 B2, Priority date 20 Dec 2010, Priority No. US20100973353 20101220

    Research output: Patent

    Open Access
    File
    153 Downloads (Pure)
  • 2012

    Frequency synthesiser

    Drago, S. (Inventor), Sebastiano, F. (Inventor), Leenaerts, D. M. W. (Inventor), Breems, L. J. (Inventor) & Nauta, B. (Inventor), 7 Jul 2012, Patent No. US2012 0139587 A1, Priority date 3 Apr 2009, Priority No. EP20090157284 20090403

    Research output: Patent

    Open Access
    File
    131 Downloads (Pure)
  • Spur reduction technique for sampling PLLs

    Gao, X. (Inventor), Bahai, A. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor), Bohsali, M. (Inventor), Djabbari, A. (Inventor) & Socci, G. (Inventor), 21 Jun 2012, Patent No. US20120154003 A1, Priority date 20 Dec 2010, Priority No. 12/973,353

    Research output: Patent

    File
    35 Downloads (Pure)
  • 2011

    Operation Amplifier

    Tetsuya, S. (Inventor) & Nauta, B. (Inventor), 14 Dec 2011, Patent No. JP4838760 B2, Priority No. JP20070152878 20070608

    Research output: Patent

    Open Access
    File
    134 Downloads (Pure)
  • 2010

    Amplification factor variable amplifier

    Akitsugu, O. (Inventor) & Nauta, B. (Inventor), 24 Nov 2010, Patent No. JP4585461 (B2), Priority No. JP20060020943 20060130

    Research output: Patent

  • Frequency divider

    Acar, M. (Inventor), Leenaerts, D. M. W. (Inventor) & Nauta, B. (Inventor), 15 Jun 2010, Patent No. US7737738 B2, Priority date 6 Aug 2004

    Research output: Patent

    File
    223 Downloads (Pure)
  • Frequency divider

    Acar, M. (Inventor), Nauta, B. (Inventor) & Leenaerts, D. M. W. (Inventor), 2 Mar 2010, Patent No. US7671641 B1, Priority date 4 Mar 2005

    Research output: Patent

    File
    141 Downloads (Pure)
  • Low power and low spur sampling PLL

    Gao, X. (Inventor), Klumperink, E. A. M. (Inventor), Bahai, A. (Inventor), Bohsali, M. (Inventor), Nauta, B. (Inventor), Djabbari, A. (Inventor) & Socci, G. (Inventor), 20 Dec 2010, Patent No. US2013038365 A1, Priority date 20 Dec 2010

    Research output: Patent

  • Phase-locked loop including sampling phase detector and charge pump with pulse width control

    Gao, X. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor), Bohsali, M. (Inventor), Kiaei, A. (Inventor), Socci, G. (Inventor) & Djabbari, A. (Inventor), 15 Jun 2010, Patent No. US7737743B1, Priority date 15 Jun 2010

    Research output: Patent

    File
    96 Downloads (Pure)
  • Polyphase harmonic rejection mixer

    Ru, Z. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Brekelmans, J. H. A. (Inventor), 12 Aug 2010, Patent No. WO2010089700 A1, Priority No. EP20090100095 20090204

    Research output: Patent

    Open Access
    File
    154 Downloads (Pure)
  • 2009

    Phase-Locked-loop with reduced clock jitter

    Nauta, B. (Inventor), van de Beek, R. C. H. (Inventor) & Vaucher, C. S. (Inventor), 20 Oct 2009, Patent No. US7606343B2

    Research output: Patent

    File
    141 Downloads (Pure)
  • 2008

    Operation amplifier

    Tetsuya, S. (Inventor) & Nauta, B. (Inventor), 18 Dec 2008, Patent No. JP2008306562 (A), Priority No. JP20070152878 20070608

    Research output: Patent

    Open Access
    File
    29 Downloads (Pure)
  • Phase-locked loop including sampling phase detector and charge pump with pulse width control

    Gao, X. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor), Bohsali, M. (Inventor), Kiaei, A. (Inventor), Socci, G. (Inventor) & Djabbari, A. (Inventor), 7 Mar 2008, (Submitted) Patent No. US20080044522, Priority date 15 Jun 2010

    Research output: Patent

    File
    46 Downloads (Pure)
  • 2007

    Amplification factor variable amplifier

    Akitsugu, O. (Inventor) & Nauta, B. (Inventor), 9 Aug 2007, Patent No. JP2007202049 (A), Priority No. JP20060020943 20060130

    Research output: Patent

    File
    46 Downloads (Pure)
  • Phase locked loop

    van de Beek, R. C. H. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Vaucher, C. S. (Inventor), 15 May 2007, Patent No. US7218157 B2, Priority date 31 Jul 2003

    Research output: Patent

    File
    69 Downloads (Pure)
  • 2006

    Frequency divider

    Acar, M. (Inventor), Leenaerts, D. M. W. (Inventor) & Nauta, B. (Inventor), 16 Feb 2006, Patent No. WO2006016312 (A1), Priority date 6 Aug 2004, Priority No. EP20040103804 20040806

    Research output: Patent

    Open Access
    File
    86 Downloads (Pure)
  • Line driver with adaptive output impedance

    Nauta, B. (Inventor), 7 Jun 2006, Patent No. EP0917788(B1), Priority date 2 Feb 1998

    Research output: Patent

    File
    45 Downloads (Pure)
  • Phase locked loop

    van de Beek, R. C. H. (Inventor), Klumperink, E. A. M. (Inventor), Nauta, B. (Inventor) & Vaucher, C. S. (Inventor), 27 Jul 2006, Patent No. US2006 0164137A1, Priority date 31 Jul 2003

    Research output: Patent

    File
    28 Downloads (Pure)