Research Output per year
Research Output 1990 2012
Sabrewing: A lightweight architecture for combined floating-point and integer arithmetic
Bruintjes, T., Walters, K. H. G., Gerez, S. H., Molenkamp, E. & Smit, G. J. M., Jan 2012, In : ACM transactions on architecture and code optimization. Volume 8, Issue 4, p. 1-22 22 p.Research output: Contribution to journal › Article › Academic › peer-review
File
Streaming Reduction Circuit
Gerards, M. E. T., Kuper, J., Kokkeler, A. B. J. & Molenkamp, E., 27 Aug 2009, Proceedings of the 12th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools. Los Alamitos: IEEE Computer Society, p. 287-292 6 p. 10.1109/DSD.2009.141Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
File
Tool Demonstration: CLasH - From Haskell to Hardware
Baaij, C. P. R., Kooijman, M., Kuper, J., Gerards, M. E. T. & Molenkamp, E., 2009, Proceedings of the 2nd ACM SIGPLAN symposium on Haskell. New York: Association for Computing Machinery (ACM), p. 3-3 1 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic
File
Design citeria for apllications with non-manifest loops
Mansour, O., Molenkamp, E. & Krol, T., 20 Oct 2004, Proceedings PROGRESS 2004 Embedded Systems Symposium. Nieuwegein, the Netherlands: STW, p. 108-114Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
File
Energy-Efficiency of the Montium Reconfigurable Tile Processor
Heysters, P. M., Smit, G. J. M. & Molenkamp, E., Jun 2004, Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'04). Las Vegas, USA: CSREA Press, p. 38-44 7 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
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Activities 1993 1998
- 6 Oral presentation
Brush up your VHDL usage
Egbert Molenkamp (Keynote speaker)6 Sep 1998
Activity: Talk or presentation › Oral presentation
Brush up your VHDL usage
Egbert Molenkamp (Keynote speaker)26 Oct 1998
Activity: Talk or presentation › Oral presentation
Processes with 'incomplete' sensitivity lists and their synthesis aspects
Egbert Molenkamp (Keynote speaker), G.E. Mekenkamp (Keynote speaker)20 Oct 1997
Activity: Talk or presentation › Oral presentation
Specifying With VHDL and Synthesis of VHDL: Two Case Studies
Egbert Molenkamp (Keynote speaker)16 Oct 1995
Activity: Talk or presentation › Oral presentation
SIL: An Intermediate for Syntax-Based VHDL Synthesis
Egbert Molenkamp (Keynote speaker), G.E. Mekenkamp (Contributor), J. Hofstede (Contributor), Th. Krol (Contributor)4 Apr 1995
Activity: Talk or presentation › Oral presentation