Harijot Singh Bindra

dr.ir

20172019

Research output per year

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Research Output

  • 5 Conference contribution
  • 1 Article
  • 1 PhD Thesis - Research UT, graduation UT

A 0.2 - 8 MS/s 10b flexible SAR ADC Achieving 0.35 - 2.5 fJ/Conv-Step and using self-quenched dynamic bias comparator

Bindra, H. S., Annema, A-J., Louwsma, S. M. & Nauta, B., 11 Jun 2019, 2019 Symposium on VLSI Circuits, VLSI Circuits 2019 - Digest of Technical Papers: Digest of Technical Papers. Piscataway, NJ: IEEE, p. C74-C75 8778093. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; vol. 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Open Access
File
  • 75 Downloads (Pure)

    A 4MS/s 10b SAR ADC with integrated Class-A buffers in 65nm CMOS with near rail-to-rail input using a single 1.2V supply

    Bindra, H. S., Annema, A. J., Wienk, G. J. M., Nauta, B. & Louwsma, S., 17 Apr 2019, 2019 IEEE Custom Integrated Circuits Conference (CICC) . Austin, TX, USA: IEEE, 8780150. (Proceedings of the Custom Integrated Circuits Conference; vol. 2019-April).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    Open Access
    File
  • 1 Citation (Scopus)
    66 Downloads (Pure)

    Low Energy Design Techniques For Data Converters

    Bindra, H. S., 13 Nov 2019, Enschede: University of Twente. 163 p.

    Research output: ThesisPhD Thesis - Research UT, graduation UT

    Open Access
    File
  • 626 Downloads (Pure)

    A 1.2-V Dynamic bias latch-type comparator in 65-nm CMOS with 0.4-mV input noise

    Bindra, H. S., Lokin, C. E., Schinkel, D., Annema, A. J. & Nauta, B., 1 Jul 2018, In : IEEE journal of solid-state circuits. 53, 7, p. 1902-1912 11 p.

    Research output: Contribution to journalArticleAcademicpeer-review

    Open Access
    File
  • 15 Citations (Scopus)
    1036 Downloads (Pure)

    A 30fJ/comparison dynamic bias comparator

    Bindra, H. S., Lokin, C. E., Annema, A. J. & Nauta, B., 12 Sep 2017, ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference . Leuven, Belgium: IEEE Solid-State Circuits Society, p. 71-74 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    Open Access
    File
  • 6 Citations (Scopus)
    701 Downloads (Pure)