Calculated based on number of publications stored in Pure and citations from Scopus
20002024

Research activity per year

Search results

  • 2004

    A fault-tolerant solid state mass memory for highly reliable instrumentation

    Cardarilli, G. C., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 8 Nov 2004, Proceedings of the 21st IEEE Instrumentation and Measurement Technology Conference: From the electrometer to the networked instruments: a giant step toward a deeper knowledgd. Demidenko, S., Ottoboni, R., Petri, D., Piuri, V. & Chong Tad Weng, D. (eds.). IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

  • A signed digit adder with error correction and graceful degradation capabilities

    Cardarilli, G. C., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 2004, Proceedings - 10th IEEE International On-Line Testing Symposium, IOLTS 2004.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    1 Citation (Scopus)
  • Data integrity evaluations of Reed Solomon codes for storage systems [solid state mass memories]

    Cardarilli, G. C., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 2004, 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings. Piscataway, NJ: IEEE, 1347836. (IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2004; vol. 2004, no. 19).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    15 Citations (Scopus)
  • Markov models of fault-tolerant memory systems under SEU

    Schiano, L., Ottavi, M. & Lombardi, F., 30 Aug 2004, Records of the IEEE International Workshop on Memory Technology, Design and Testing. Wilk, T., Singh, A. & Rajsuman, R. (eds.). IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    19 Citations (Scopus)
  • On the yield of compiler-based eSRAMs

    Wang, X., Ottavi, M., Meyer, F. & Lombardi, F., 8 Nov 2004, IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. IEEE, 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    9 Citations (Scopus)
  • Simulation of reconfigurable memory core yield

    Ottavi, M., Meyer, F. J., Wang, X. & Lombardi, F., 2004, Proceedings of the ACM Great Lakes Symposium on VLSI. ACM Publishing, p. 136-140 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    3 Citations (Scopus)
  • Testing of inter-word coupling faults in word-oriented SRAMs

    Wang, X., Ottavi, M. & Lombardi, F., 2004, IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    1 Citation (Scopus)
  • Yield evaluation methods of SRAM arrays: A comparative study

    Ottavi, M., Schiano, L., Wang, X., Kim, Y.-B., Meyer, F. J. & Lombardi, F., 2004, Proceedings of the 21st IEEE Instrumentation and Measurement Technology Conference. Piscataway, NJ: IEEE, Vol. 3.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    4 Citations (Scopus)
  • 2003

    A fault tolerant hardware based file system manager for solid state mass memory

    Cardarilli, G. C., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003, ISCAS '03. Piscataway, NJ: IEEE, p. V-649 - V-652 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    2 Citations (Scopus)
  • Design of a fault tolerant Solid State Mass Memory

    Cardarilli, G. C., Leandri, A., Marinucci, P., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 2003, In: IEEE transactions on reliability. 52, 4, p. 476-491

    Research output: Contribution to journalArticleAcademicpeer-review

    45 Citations (Scopus)
  • Error detection in signed digit arithmetic circuit with parity checker

    Cardarilli, G. C., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 2003, Proceedings 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Piscataway, NJ: IEEE, 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    13 Citations (Scopus)
  • Yield analysis of compiler-based arrays of embedded SRAMs

    Wang, X., Ottavi, M. & Lombardi, F., 2003, Proceedings 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Piscataway, NJ: IEEE, 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    7 Citations (Scopus)
  • 2002

    A self-checking cell logic block for fault tolerant FPGAs

    Pontarelli, S., Cardarilli, G. C., Leandri, A., Ottavi, M., Re, M. & Salsano, A., 2002, Proceedings - IEEE International Symposium on Circuits and Systems.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    2 Citations (Scopus)
  • Bit flip injection in processor-based architectures: A case study

    Cardarilli, G. C., Kaddour, F., Leandri, A., Ottavi, M., Pontarelli, S. & Velazco, R., 2002, Proceedings of the 8th IEEE International On-Line Testing Workshop, IOLTW 2002. Piscataway, NJ: IEEE, 11 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    31 Citations (Scopus)
  • 2001

    Design of a totally self checking signature analysis checker for finite state machines

    Ottavi, M., Cardarilli, G. C., Cellitti, D., Pontarelli, S., Re, M. & Salsano, A., 2001, IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    3 Citations (Scopus)
  • Development of a dynamic routing system for a fault tolerant solid state mass memory

    Ottavi, M., Cardarilli, G. C., Marinucci, P., Pontarelli, S. & Salsano, M. R., 2001, ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. Piscataway, NJ: IEEE, Vol. 5. 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

  • Sistemi elettronici tolleranti ai guasti per applicazioni spaziali

    Bertazzoni, S., Cardarilli, G. C., Di Giovenale, D., Ottavi, M., Pontarelli, S., Salsano, A. & Marinuccii, P., 2001, In: Alta Frequenza Rivista Di Elettronica. 13, 3, 7 p.

    Research output: Contribution to journalArticleAcademicpeer-review

    1 Downloads (Pure)
  • System-on-chip oriented fault-tolerant sequential systems implementation methodology

    Pontarelli, S., Cardarilli, G. C., Malvoni, A., Ottavi, M., Re, M. & Salsano, A., 2001, Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 24-26 October 2001, San Francisco, California. Piscataway, NJ: IEEE, 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    10 Citations (Scopus)
  • 2000

    A fault-tolerant 176 Gbit Solid State Mass Memory architecture

    Cardarilli, G. C., Marinucci, P., Ottavi, M. & Salsano, A., 2000, Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 25-27 October 2000, Yamanashi, Japan. Los Alamitos, California: IEEE, p. 173-180 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    5 Citations (Scopus)