Marco Ottavi
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Marco Ottavi

Dr.

 https://orcid.org/0000-0002-5064-7342
Calculated based on number of publications stored in Pure and citations from Scopus
20002024

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  • 2014

    Using memristor state change behavior to identify faults in photovoltaic arrays

    Mathew, J., Ottavi, M., Yang, Y. & Pradhan, D. K., 2014, Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Piscataway, NJ: IEEE

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    5 Citations (Scopus)
  • 2013

    Error detection in ternary CAMs using bloom filters

    Pontarelli, S., Ottavi, M., Evans, A. & Wen, S.-J., 2013, Proceedings - Design, Automation and Test in Europe, DATE. IEEE, p. 1474-1479 6 p. (Proceedings -Design, Automation and Test in Europe, DATE).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    11 Citations (Scopus)

  • F-DICE: A multiple node upset tolerant flip-flop for highly radioactive environments

    Campitelli, S., Ottavi, M., Pontarelli, S., Marchioro, A., Felici, D. & Lombardi, F., 2013, Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    18 Citations (Scopus)
  • 2012

    A novel write-scheme for data integrity in memristor-based crossbar memories

    Ruotolo, A. G., Ottavi, M., Pontarelli, S. & Lombardi, F., 2012, Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2012. p. 168-173

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    8 Citations (Scopus)

  • High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies

    Bolchini, C., Miele, A., Sandionigi, C., Ottavi, M., Pontarelli, S., Salsano, A., Metra, C., Omaña, M., Rossi, D., Reorda, M. S., Sterpone, L., Violante, M., Gerardin, S., Bagatin, M. & Paccagnella, A., 2012, Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    4 Citations (Scopus)

  • Introducing MEDIAN: A new COST action on manufacturable and dependable multicore architectures at nanoscale

    Ottavi, M., 2012, Proceedings - 2012 17th IEEE European Test Symposium, ETS 2012.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    1 Citation (Scopus)

  • On the design of two single event tolerant slave latches for scan delay testing

    Lu, Y., Lombardi, F., Pontarelli, S. & Ottavi, M., 2012, Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    2 Citations (Scopus)
  • 2011

    Feedback based droop mitigation

    Pontarelli, S., Ottavi, M., Salsano, A. & Zarrineh, K., 2011, Proceedings -Design, Automation and Test in Europe, DATE.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    3 Citations (Scopus)

  • Modeling magnetic quantum-dot cellular automata by HDL

    Ottavi, M., Pontarelli, S., Salsano, A. & Lombardi, F., 18 Aug 2011, 2011 11th IEEE International Conference on Nanotechnology. IEEE, p. 1139-1144 6 p. 6144314

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

  • On the Effects of Intra-gate Resistive Open Defects in Gates at Nanoscaled CMOS

    Rajderkar, N., Ottavi, M., Pontarelli, S., Han, J. & Lombardi, F., 2011, IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    1 Citation (Scopus)
  • 2010

    Error detection and correction in content addressable memories

    Pontarelli, S., Ottavi, M. & Salsano, A., 2010, Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    9 Citations (Scopus)

  • High throughput and low power dissipation in QCA pipelines using Bennett clocking

    Ottavi, M., Pontarelli, S., DeBenedictis, E., Salsano, A., Kogge, P. & Lombarde, F., 2010, 2010 IEEE/ACM International Symposium on Nanoscale Architectures.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    7 Citations (Scopus)

  • Modeling Open Defects in Nanometric Scale CMOS

    Hariharan, A. N., Pontarelli, S., Ottavi, M. & Lombardi, F., 2010, IEEE 25th International symposium on defect and fault tolerance in VLSI systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    5 Citations (Scopus)
  • 2007

    On the error effects of random clock shifts in quantum-dot cellular automata circuits

    Ottavi, M., Hashempour, H., Vankamamidi, V., Karim, F., Walus, K. & Ivanov, A., 2007, Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    4 Citations (Scopus)
  • 2006

    Clocking and cell placement for QCA

    Vankamamidi, V., Ottavi, M. & Lombardi, F., 2006, 2006 6th IEEE Conference on Nanotechnology, IEEE-NANO 2006.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    63 Citations (Scopus)

  • Design and evaluation of a hardware on-line program-flow checker for embedded microcontrollers

    Ottavi, M., Pontarelli, S., Leandri, A. & Salsano, A., 2006, Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    3 Citations (Scopus)

  • Localization of faults in radix-n signed digit adders

    Cardarilli, G. C., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 2006, Proceedings - IOLTS 2006: 12th IEEE International On-Line Testing Symposium.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    4 Citations (Scopus)

  • Novel designs for thermally robust coplanar crossing in QCA

    Bhanja, S., Ottavi, M., Lombardi, F. & Pontarelli, S., 2006, Proceedings -Design, Automation and Test in Europe, DATE 2006.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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    23 Citations (Scopus)
    30 Downloads (Pure)

  • Reliability evaluation of repairable/reconfigurable FPGAs

    Pontarelli, S., Ottavi, M., Vankamamidi, V., Salsano, A. & Lombardi, F., 2006, Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    11 Citations (Scopus)

  • Timing verification of QCA memory architectures

    Ottavi, M., Schiano, L., Pontarelli, S., Vankamamidi, V. & Lombardi, F., 2006, 2006 6th IEEE Conference on Nanotechnology, IEEE-NANO 2006.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    6 Citations (Scopus)
  • 2005

    Design of a QCA memory with parallel read/serial write

    Ottavi, M., Vankamamidi, V., Lombardi, F., Pontarelli, S. & Salsano, A., 2005, Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    22 Citations (Scopus)

  • Evaluating the data integrity of memory systems by configurable Markov models

    Ottavi, M., Schiano, L., Lombardi, F., Pontarelli, S. & Cardarilli, G. C., 2005, Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    1 Citation (Scopus)

  • Modeling QCA defects at molecular-level in combinational circuits

    Momenzadeh, M., Ottavi, M. & Lombardi, F., 2005, Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. p. 208-216

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    100 Citations (Scopus)

  • Novel memory designs for QCA implementation

    Ottavi, M., Vankamamidi, V., Lombardi, F. & Pontarelli, S., 2005, 2005 5th IEEE Conference on Nanotechnology.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    21 Citations (Scopus)

  • On the analysis of Reed Solomon coding for resilience to transient/permanent faults in highly reliable memories

    Schiano, L., Ottavi, M., Lombardi, F., Pontarelli, S. & Salsano, A., 2005, Proceedings -Design, Automation and Test in Europe, DATE '05.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

  • Tile-based design of a serial memory in QCA

    Vankamamidi, V., Ottavi, M. & Lombardi, F., 2005, Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    24 Citations (Scopus)
  • 2004

    A fault-tolerant solid state mass memory for highly reliable instrumentation

    Cardarilli, G. C., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 8 Nov 2004, Proceedings of the 21st IEEE Instrumentation and Measurement Technology Conference: From the electrometer to the networked instruments: a giant step toward a deeper knowledgd. Demidenko, S., Ottoboni, R., Petri, D., Piuri, V. & Chong Tad Weng, D. (eds.). IEEE

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

  • A signed digit adder with error correction and graceful degradation capabilities

    Cardarilli, G. C., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 2004, Proceedings - 10th IEEE International On-Line Testing Symposium, IOLTS 2004.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    1 Citation (Scopus)

  • Data integrity evaluations of Reed Solomon codes for storage systems [solid state mass memories]

    Cardarilli, G. C., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 2004, 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings. Piscataway, NJ: IEEE, 1347836. (IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2004; vol. 2004, no. 19).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    15 Citations (Scopus)

  • Markov models of fault-tolerant memory systems under SEU

    Schiano, L., Ottavi, M. & Lombardi, F., 30 Aug 2004, Records of the IEEE International Workshop on Memory Technology, Design and Testing. Wilk, T., Singh, A. & Rajsuman, R. (eds.). IEEE

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    19 Citations (Scopus)

  • On the yield of compiler-based eSRAMs

    Wang, X., Ottavi, M., Meyer, F. & Lombardi, F., 8 Nov 2004, IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. IEEE, 9 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    9 Citations (Scopus)

  • Simulation of reconfigurable memory core yield

    Ottavi, M., Meyer, F. J., Wang, X. & Lombardi, F., 2004, Proceedings of the ACM Great Lakes Symposium on VLSI. ACM Publishing, p. 136-140 5 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    3 Citations (Scopus)

  • Testing of inter-word coupling faults in word-oriented SRAMs

    Wang, X., Ottavi, M. & Lombardi, F., 2004, IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    1 Citation (Scopus)

  • Yield evaluation methods of SRAM arrays: A comparative study

    Ottavi, M., Schiano, L., Wang, X., Kim, Y.-B., Meyer, F. J. & Lombardi, F., 2004, Proceedings of the 21st IEEE Instrumentation and Measurement Technology Conference. Piscataway, NJ: IEEE, Vol. 3.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    4 Citations (Scopus)
  • 2003

    A fault tolerant hardware based file system manager for solid state mass memory

    Cardarilli, G. C., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003, ISCAS '03. Piscataway, NJ: IEEE, p. V-649 - V-652 4 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    2 Citations (Scopus)

  • Error detection in signed digit arithmetic circuit with parity checker

    Cardarilli, G. C., Ottavi, M., Pontarelli, S., Re, M. & Salsano, A., 2003, Proceedings 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Piscataway, NJ: IEEE, 8 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    13 Citations (Scopus)

  • Yield analysis of compiler-based arrays of embedded SRAMs

    Wang, X., Ottavi, M. & Lombardi, F., 2003, Proceedings 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Piscataway, NJ: IEEE, 8 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    7 Citations (Scopus)
  • 2002

    A self-checking cell logic block for fault tolerant FPGAs

    Pontarelli, S., Cardarilli, G. C., Leandri, A., Ottavi, M., Re, M. & Salsano, A., 2002, Proceedings - IEEE International Symposium on Circuits and Systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    2 Citations (Scopus)

  • Bit flip injection in processor-based architectures: A case study

    Cardarilli, G. C., Kaddour, F., Leandri, A., Ottavi, M., Pontarelli, S. & Velazco, R., 2002, Proceedings of the 8th IEEE International On-Line Testing Workshop, IOLTW 2002. Piscataway, NJ: IEEE, 11 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    31 Citations (Scopus)
  • 2001

    Design of a totally self checking signature analysis checker for finite state machines

    Ottavi, M., Cardarilli, G. C., Cellitti, D., Pontarelli, S., Re, M. & Salsano, A., 2001, IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    3 Citations (Scopus)

  • Development of a dynamic routing system for a fault tolerant solid state mass memory

    Ottavi, M., Cardarilli, G. C., Marinucci, P., Pontarelli, S. & Salsano, M. R., 2001, ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. Piscataway, NJ: IEEE, Vol. 5. 4 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

  • System-on-chip oriented fault-tolerant sequential systems implementation methodology

    Pontarelli, S., Cardarilli, G. C., Malvoni, A., Ottavi, M., Re, M. & Salsano, A., 2001, Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 24-26 October 2001, San Francisco, California. Piscataway, NJ: IEEE, 6 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    10 Citations (Scopus)
  • 2000

    A fault-tolerant 176 Gbit Solid State Mass Memory architecture

    Cardarilli, G. C., Marinucci, P., Ottavi, M. & Salsano, A., 2000, Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 25-27 October 2000, Yamanashi, Japan. Los Alamitos, California: IEEE, p. 173-180 8 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

    5 Citations (Scopus)