A 0.45pJ/conv-step 1.2Gs/s 6b full-Nyquist non-calibrated flash ADC in 45nm CMOS and its scaling behavior

P. Veldhorst, George Goksun, Berry Buter, Maarten Vertregt, Anne J. Annema, Bram Nauta

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    7 Citations (Scopus)
    52 Downloads (Pure)

    Abstract

    A 6-bit 1.2 Gs/s non-calibrated flash ADC in a standard 45nm CMOS process, that achieves 0.45pJ/conv-step at full Nyquist bandwidth, is presented. Power efficient operation is achieved by a full optimization of amplifier blocks, and by innovations in the comparator and encoding stage. The performance of a non-calibrated flash ADC is directly related to device properties; a scaling analysis of our ADC in and across CMOS technologies gives insight into the excellent usability of 45nm technology for AD converter design.
    Original languageEnglish
    Title of host publicationProceedings of the ESSCIRC 2009
    Place of PublicationPiscataway
    PublisherIEEE
    Pages464-467
    Number of pages4
    ISBN (Print)978-1-4244-4353-6
    DOIs
    Publication statusPublished - 14 Sep 2009
    Event35th European Solid-State Circuits Conference, ESSCIRC 2009 - Athene, Greece
    Duration: 14 Sep 200918 Sep 2009
    Conference number: 35

    Conference

    Conference35th European Solid-State Circuits Conference, ESSCIRC 2009
    Abbreviated titleESSCIRC
    CountryGreece
    CityAthene
    Period14/09/0918/09/09

    Keywords

    • IR-70007
    • METIS-265787
    • Amplifiers
    • EWI-17419
    • comparators (circuits) radio access networks
    • Nyquist criterion
    • analogue-digital conversion
    • CMOS integrated circuits

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