A CMOS temperature switch with uncalibrated high accuracy is presented. The circuit is based on the classical CMOS bandgap reference structure, using parasitic PNPs and a PTAT multiplier. The circuit was designed in a standard digital 0.18 m CMOS process. The temperature switch has an in-designed hysteresis of 1.2°C around a threshold value of 128°C. At the switching-threshold all matched transistors have also matched operating conditions, yielding a temperature threshold that is highly independent of transistor output resistance and supply voltage. The chip area was minimized using a novel and generic strategy. With a chip area of only 0.03 mm2, the onwafer 3 spread of the threshold temperature is 1.1°C. Power consumption is only 15 A at 1 volt supply.
|Number of pages||8|
|Journal||Analog integrated circuits and signal processing|
|Publication status||Published - Oct 2004|
- Circuit design
- bandgap reference
- design strategy
- temperature switch