A 1.2-V 10- µW NPN-Based Temperature Sensor in 65-nm CMOS With an Inaccuracy of 0.2 °C (3σ) From 70 °C to 125 °C

Fabio Sebastiano; Lucien J. Breems; Kofi A.A. Makinwa; S. Drago; Domine M.W. Leenaerts; Bram Nauta

doi:10.1109/JSSC.2010.2076610

A 1.2-V 10- µW NPN-Based Temperature Sensor in 65-nm CMOS With an Inaccuracy of 0.2 °C (3σ) From 70 °C to 125 °C

Fabio Sebastiano, Lucien J. Breems, Kofi A.A. Makinwa, S. Drago, Domine M.W. Leenaerts, Bram Nauta

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Abstract

An NPN-based temperature sensor with digital output transistors has been realized in a 65-nm CMOS process. It achieves a batch-calibrated inaccuracy of ±0.5 ◦C (3¾) and a trimmed inaccuracy of ±0.2 ◦C (3¾) over the temperature range from −70 ◦C to 125 ◦C. This performance is obtained by the use of NPN transistors as sensing elements, the use of dynamic techniques, i.e. correlated double sampling and dynamic element matching, and a single room-temperature trim. The sensor draws 8.3 μA from a 1.2-V supply and occupies an area of 0.1 mm2.

Original language	English
Pages (from-to)	2591-2601
Number of pages	11
Journal	IEEE journal of solid-state circuits
Volume	45
Issue number	12
DOIs	https://doi.org/10.1109/JSSC.2010.2076610
Publication status	Published - 1 Dec 2010

Keywords

CMOS analog integrated circuits
IR-75260
METIS-275785
EWI-19100
smart sensors
sigma-delta modulation
Temperature sensors

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Sebastiano_IEEE_JSSC_Dec_2010_Special_Issue_on_ISSCC_2010Accepted author version, 660 KB

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title = "A 1.2-V 10- µW NPN-Based Temperature Sensor in 65-nm CMOS With an Inaccuracy of 0.2 °C (3σ) From 70 °C to 125 °C",

abstract = "An NPN-based temperature sensor with digital output transistors has been realized in a 65-nm CMOS process. It achieves a batch-calibrated inaccuracy of ±0.5 ◦C (3¾) and a trimmed inaccuracy of ±0.2 ◦C (3¾) over the temperature range from −70 ◦C to 125 ◦C. This performance is obtained by the use of NPN transistors as sensing elements, the use of dynamic techniques, i.e. correlated double sampling and dynamic element matching, and a single room-temperature trim. The sensor draws 8.3 μA from a 1.2-V supply and occupies an area of 0.1 mm2.",

keywords = "CMOS analog integrated circuits, IR-75260, METIS-275785, EWI-19100, smart sensors, sigma-delta modulation, Temperature sensors",

author = "Fabio Sebastiano and Breems, {Lucien J.} and Makinwa, {Kofi A.A.} and S. Drago and Leenaerts, {Domine M.W.} and Bram Nauta",

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AU - Sebastiano, Fabio

AU - Breems, Lucien J.

AU - Makinwa, Kofi A.A.

AU - Drago, S.

AU - Leenaerts, Domine M.W.

AU - Nauta, Bram

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AB - An NPN-based temperature sensor with digital output transistors has been realized in a 65-nm CMOS process. It achieves a batch-calibrated inaccuracy of ±0.5 ◦C (3¾) and a trimmed inaccuracy of ±0.2 ◦C (3¾) over the temperature range from −70 ◦C to 125 ◦C. This performance is obtained by the use of NPN transistors as sensing elements, the use of dynamic techniques, i.e. correlated double sampling and dynamic element matching, and a single room-temperature trim. The sensor draws 8.3 μA from a 1.2-V supply and occupies an area of 0.1 mm2.

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KW - METIS-275785

KW - EWI-19100

KW - smart sensors

KW - sigma-delta modulation

KW - Temperature sensors

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DO - 10.1109/JSSC.2010.2076610

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JO - IEEE journal of solid-state circuits

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ER -

A 1.2-V 10- µW NPN-Based Temperature Sensor in 65-nm CMOS With an Inaccuracy of 0.2 °C (3σ) From 70 °C to 125 °C

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Keywords

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