A (128f_s)$ multi-bit ΣΔ CMOS audio DAC with real-time DEM and 115dB SFDR

Adrianus Johannes Maria van Tuijl, John van den Homberg, Derk Reefman, Corné Bastiaansen, Leon van der Dussen

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    Abstract

    A continuous-time 5b ΣΔ audio DAC operates at 5.65MS/s $(128f_s)$. SFDR of -115dB and noise of -119dB (unweighted) are achieved by realtime DEM that cancels mismatch completely in each sample. Chip area is $2mm^2$ in a 0.18μm, thick oxide 3.3V CMOS process. Total power consumption is 150mW.
    Original languageEnglish
    Title of host publicationIEEE International Solid-State Circuits Conference (ISSCC 2004)
    Place of PublicationSan Francisco, USA
    PublisherIEEE
    Pages368-369
    Number of pages8
    ISBN (Print)0780382676
    DOIs
    Publication statusPublished - Feb 2004
    EventIEEE International Solid-State Circuits Conference, ISSCC 2004 - San Francisco, United States
    Duration: 15 Feb 200419 Feb 2004

    Conference

    ConferenceIEEE International Solid-State Circuits Conference, ISSCC 2004
    Abbreviated titleISSCC 2004
    CountryUnited States
    CitySan Francisco
    Period15/02/0419/02/04

    Keywords

    • EWI-14498
    • IR-67677
    • METIS-222130

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