A 1.2V 10μW NPN-Based Temperature Sensor in 65nm CMOS with an inaccuracy of ±0.2°C (3s) from -70°C to 125°C

F. Sebastiano, L.J. Breems, K.A.A. Makinwa, S. Drago, D.M.W. Leenaerts, Bram Nauta

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    This paper describes a temperature sensor realized in a 65nm CMOS process with a batch-calibrated inaccuracy of ±0.5°C (3σ) and a trimmed inaccuracy of ±0.2°C (3σ) from –70°C to 125°C. This represents a 10-fold improvement in accuracy compared to other deep-submicron temperature sensors [1,2], and is comparable with that of state-of-the-art sensors implemented in larger-featuresize processes [3,4]. The sensor draws 8.3μA from a 1.2V supply and occupies an area of 0.1mm2, which is 45 times less than that of sensors with comparable accuracy [3,4]. These advances are enabled by the use of NPN transistors as sensing elements, the use of dynamic techniques i.e. correlated double sampling (CDS) and dynamic element matching (DEM), and a single room-temperature trim.
    Original languageUndefined
    Title of host publicationSolid-State Circuits Conference Digest of Technical Papers (ISSCC) 2010 IEEE International
    Place of PublicationPiscataway
    Number of pages2
    ISBN (Print)978-1-4244-6033-5
    Publication statusPublished - 7 Feb 2010
    EventIEEE International Solid-State Circuits Conference, ISSCC 2010 - San Francisco, United States
    Duration: 7 Feb 201011 Feb 2010

    Publication series

    PublisherIEEE Press
    ISSN (Print)0193-6530


    ConferenceIEEE International Solid-State Circuits Conference, ISSCC 2010
    Abbreviated titleISSCC
    Country/TerritoryUnited States
    CitySan Francisco


    • METIS-270915
    • EWI-18149
    • IR-72402

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