A 1.35 GS/s, 10b, 175 mW time-interleaved AD converter in 0.13 µm CMOS

S.M. Louwsma; Adrianus Johannes Maria van Tuijl; M. Vertregt; Bram Nauta

doi:10.1109/VLSIC.2007.4342766

A 1.35 GS/s, 10b, 175 mW time-interleaved AD converter in 0.13 µm CMOS

S.M. Louwsma, Adrianus Johannes Maria van Tuijl, M. Vertregt, Bram Nauta

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

26 Citations (Scopus)

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Abstract

A time-interleaved ADC is presented with 16 channels, each consisting of two Successive Approximation (SA) ADCs in a pipeline configuration. Three techniques are presented to increase the speed of an SA-ADC. Single channel performance is 6.9 ENOB at an input frequency of 4 GHz. Multi-channel performance is 7.7 ENOB at 1.35 GS/s with an ERBW of 1 GHz and a FoM of 0.6 pJ/conversion-step. Keywords: ADC, SAR, SA-ADC, time-interleaved, T/H.

Original language	English
Title of host publication	2007 IEEE Symposium on VLSI Circuits
Place of Publication	Piscataway
Publisher	IEEE
Pages	62-63
Number of pages	2
ISBN (Print)	978-4-900784-04-8
DOIs	https://doi.org/10.1109/VLSIC.2007.4342766
Publication status	Published - 12 Jun 2007
Event	2007 IEEE Symposium on VLSI Circuits, VLSIC 2007 - Rihga Royal Hotel, Kyoto, Japan Duration: 14 Jun 2007 → 16 Jun 2007

Conference

Conference	2007 IEEE Symposium on VLSI Circuits, VLSIC 2007
Abbreviated title	VLSIC
Country/Territory	Japan
City	Kyoto
Period	14/06/07 → 16/06/07

Keywords

EWI-10882
IR-64287
METIS-245725

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10.1109/VLSIC.2007.4342766

Louwsma_VLSI_2007Accepted author version, 1.02 MB

Cite this

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title = "A 1.35 GS/s, 10b, 175 mW time-interleaved AD converter in 0.13 µm CMOS",

abstract = "A time-interleaved ADC is presented with 16 channels, each consisting of two Successive Approximation (SA) ADCs in a pipeline configuration. Three techniques are presented to increase the speed of an SA-ADC. Single channel performance is 6.9 ENOB at an input frequency of 4 GHz. Multi-channel performance is 7.7 ENOB at 1.35 GS/s with an ERBW of 1 GHz and a FoM of 0.6 pJ/conversion-step. Keywords: ADC, SAR, SA-ADC, time-interleaved, T/H.",

keywords = "EWI-10882, IR-64287, METIS-245725",

author = "S.M. Louwsma and {van Tuijl}, {Adrianus Johannes Maria} and M. Vertregt and Bram Nauta",

year = "2007",

month = jun,

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doi = "10.1109/VLSIC.2007.4342766",

language = "English",

isbn = "978-4-900784-04-8",

pages = "62--63",

booktitle = "2007 IEEE Symposium on VLSI Circuits",

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note = "2007 IEEE Symposium on VLSI Circuits, VLSIC 2007, VLSIC ; Conference date: 14-06-2007 Through 16-06-2007",

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T1 - A 1.35 GS/s, 10b, 175 mW time-interleaved AD converter in 0.13 µm CMOS

AU - Louwsma, S.M.

AU - van Tuijl, Adrianus Johannes Maria

AU - Vertregt, M.

AU - Nauta, Bram

PY - 2007/6/12

Y1 - 2007/6/12

N2 - A time-interleaved ADC is presented with 16 channels, each consisting of two Successive Approximation (SA) ADCs in a pipeline configuration. Three techniques are presented to increase the speed of an SA-ADC. Single channel performance is 6.9 ENOB at an input frequency of 4 GHz. Multi-channel performance is 7.7 ENOB at 1.35 GS/s with an ERBW of 1 GHz and a FoM of 0.6 pJ/conversion-step. Keywords: ADC, SAR, SA-ADC, time-interleaved, T/H.

AB - A time-interleaved ADC is presented with 16 channels, each consisting of two Successive Approximation (SA) ADCs in a pipeline configuration. Three techniques are presented to increase the speed of an SA-ADC. Single channel performance is 6.9 ENOB at an input frequency of 4 GHz. Multi-channel performance is 7.7 ENOB at 1.35 GS/s with an ERBW of 1 GHz and a FoM of 0.6 pJ/conversion-step. Keywords: ADC, SAR, SA-ADC, time-interleaved, T/H.

KW - EWI-10882

KW - IR-64287

KW - METIS-245725

U2 - 10.1109/VLSIC.2007.4342766

DO - 10.1109/VLSIC.2007.4342766

M3 - Conference contribution

SN - 978-4-900784-04-8

SP - 62

EP - 63

BT - 2007 IEEE Symposium on VLSI Circuits

PB - IEEE

CY - Piscataway

T2 - 2007 IEEE Symposium on VLSI Circuits, VLSIC 2007

Y2 - 14 June 2007 through 16 June 2007

ER -

A 1.35 GS/s, 10b, 175 mW time-interleaved AD converter in 0.13 µm CMOS

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