A 14-Bit Oversampled SAR ADC With Mismatch Error Shaping and Analog Range Compensation

Yuting Shen; Hanyue Li; Harijot Singh Bindra; Eugenio Cantatore; Pieter Harpe

doi:10.1109/TCSII.2023.3259821

A 14-Bit Oversampled SAR ADC With Mismatch Error Shaping and Analog Range Compensation

Yuting Shen^*, Hanyue Li, Harijot Singh Bindra, Eugenio Cantatore, Pieter Harpe

^*Corresponding author for this work

Integrated Circuit Design

Research output: Contribution to journal › Article › Academic › peer-review

8 Citations (Scopus)

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Abstract

DAC mismatch is a major challenge for high-resolution ADCs. This brief proposes an analog-detection-based input range compensation technique for high-resolution ADCs with mismatch error shaping (MES). By applying a pre-comparison and suitably switching the DAC MSB, the input loss caused by MES is compensated. By adopting a flying-capacitor sampling technique, the prediction errors found in prior solutions are avoided. The prototype 14-bit SAR ADC achieves 80.4 dB SNDR and 93 dB SFDR in a 4 kHz signal bandwidth with an OSR of 16. It only occupies 0.0034 mm2 and consumes 0.656μW under a 0.8 V supply, leading to a Schreier figure-of-merit of 178.3 dB. These features make it suitable for miniaturized high-performance IoT and biomedical systems.

Original language	English
Pages (from-to)	1719-1723
Number of pages	5
Journal	IEEE transactions on circuits and systems II: express briefs
Volume	70
Issue number	5
Early online date	21 Mar 2023
DOIs	https://doi.org/10.1109/TCSII.2023.3259821
Publication status	Published - 1 May 2023

Keywords

2024 OA procedure
flying capacitor sampling
input range compensation
mismatch error shaping (MES)
successive approximation register (SAR)
Analog-to-digital converter (ADC)

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10.1109/TCSII.2023.3259821

ArticleFinal published version, 2.06 MBLicence: Taverne

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abstract = "DAC mismatch is a major challenge for high-resolution ADCs. This brief proposes an analog-detection-based input range compensation technique for high-resolution ADCs with mismatch error shaping (MES). By applying a pre-comparison and suitably switching the DAC MSB, the input loss caused by MES is compensated. By adopting a flying-capacitor sampling technique, the prediction errors found in prior solutions are avoided. The prototype 14-bit SAR ADC achieves 80.4 dB SNDR and 93 dB SFDR in a 4 kHz signal bandwidth with an OSR of 16. It only occupies 0.0034 mm2 and consumes 0.656μW under a 0.8 V supply, leading to a Schreier figure-of-merit of 178.3 dB. These features make it suitable for miniaturized high-performance IoT and biomedical systems.",

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AU - Harpe, Pieter

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A 14-Bit Oversampled SAR ADC With Mismatch Error Shaping and Analog Range Compensation

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Keywords

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