A 1.9 μW 4.4 fJ/conversion-step, 10 bit, 1 MS/s charge redistribution ADC

Michiel van Elzakker; Ed van Tuijl; Paul Geraedts; Daniel Schinkel; Eric Klumperink; Bram Nauta

doi:10.1109/ISSCC.2008.4523148

A 1.9 μW 4.4 fJ/conversion-step, 10 bit, 1 MS/s charge redistribution ADC

Michiel van Elzakker, Ed van Tuijl, Paul Geraedts, Daniel Schinkel, Eric Klumperink, Bram Nauta

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

258 Citations (Scopus)

421 Downloads (Pure)

Abstract

A 10b SAR ADC uses a charge redistribution DAC, a two-stage comparator, and a delay-line-based controller. The ADC does not use any static bias current and power consumption is proportional to sample rate. At 1MS/s, the ADC uses 1.9μW. With 8.75 ENOB, the resulting FOM is 4.4fJ/conversion-step.

Original language	English
Title of host publication	Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC)
Place of Publication	Piscataway
Publisher	IEEE
Pages	244-245+610
ISBN (Electronic)	978-1-4244-2011-7 (CD)
ISBN (Print)	978-1-4244-2010-0
DOIs	https://doi.org/10.1109/ISSCC.2008.4523148
Publication status	Published - 5 Feb 2008
Event	IEEE International Solid- State Circuits Conference, ISSCC 2008 - San Francisco, United States Duration: 3 Feb 2008 → 7 Feb 2008

Publication series

Name	IEEE International Solid-State Circuits Conference - Digest of Technical Papers
Publisher	IEEE
Volume	2008
ISSN (Print)	0193-6530
ISSN (Electronic)	2376-8606

Conference

Conference	IEEE International Solid- State Circuits Conference, ISSCC 2008
Abbreviated title	ISSCC
Country/Territory	United States
City	San Francisco
Period	3/02/08 → 7/02/08

Keywords

2023 OA procedure

Access to Document

10.1109/ISSCC.2008.4523148

ArticleFinal published version, 610 KBLicence: Taverne

Cite this

van Elzakker, M., van Tuijl, E., Geraedts, P., Schinkel, D., Klumperink, E., & Nauta, B. (2008). A 1.9 μW 4.4 fJ/conversion-step, 10 bit, 1 MS/s charge redistribution ADC. In Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC) (pp. 244-245+610). (IEEE International Solid-State Circuits Conference - Digest of Technical Papers; Vol. 2008). IEEE. https://doi.org/10.1109/ISSCC.2008.4523148

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van Elzakker, M, van Tuijl, E, Geraedts, P, Schinkel, D, Klumperink, E & Nauta, B 2008, A 1.9 μW 4.4 fJ/conversion-step, 10 bit, 1 MS/s charge redistribution ADC. in Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC). IEEE International Solid-State Circuits Conference - Digest of Technical Papers, vol. 2008, IEEE, Piscataway, pp. 244-245+610, IEEE International Solid- State Circuits Conference, ISSCC 2008, San Francisco, California, United States, 3/02/08. https://doi.org/10.1109/ISSCC.2008.4523148

A 1.9 μW 4.4 fJ/conversion-step, 10 bit, 1 MS/s charge redistribution ADC. / van Elzakker, Michiel; van Tuijl, Ed; Geraedts, Paul et al.
Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC). Piscataway: IEEE, 2008. p. 244-245+610 (IEEE International Solid-State Circuits Conference - Digest of Technical Papers; Vol. 2008).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - Schinkel, Daniel

AU - Klumperink, Eric

AU - Nauta, Bram

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N2 - A 10b SAR ADC uses a charge redistribution DAC, a two-stage comparator, and a delay-line-based controller. The ADC does not use any static bias current and power consumption is proportional to sample rate. At 1MS/s, the ADC uses 1.9μW. With 8.75 ENOB, the resulting FOM is 4.4fJ/conversion-step.

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M3 - Conference contribution

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van Elzakker M, van Tuijl E, Geraedts P, Schinkel D, Klumperink E , Nauta B. A 1.9 μW 4.4 fJ/conversion-step, 10 bit, 1 MS/s charge redistribution ADC. In Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC). Piscataway: IEEE. 2008. p. 244-245+610. (IEEE International Solid-State Circuits Conference - Digest of Technical Papers). doi: 10.1109/ISSCC.2008.4523148

A 1.9 μW 4.4 fJ/conversion-step, 10 bit, 1 MS/s charge redistribution ADC

Abstract

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