A +20dBm highly efficient linear outphasing Class-E PA without AM/AM and AM/PM characterization requirements

Ali  Ghahremani; Anne-Johan Annema; Bram  Nauta

doi:10.1109/TCSII.2018.2877708

A +20dBm highly efficient linear outphasing Class-E PA without AM/AM and AM/PM characterization requirements

Ali Ghahremani, Anne-Johan Annema, Bram Nauta

Research output: Contribution to journal › Article › Academic › peer-review

3 Citations (Scopus)

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Abstract

Outphasing Class-E Power Amplifiers (OEPAs) using isolating power combiners and an inverse cosine signal component separator are inherently linear but suffer from low efficiency at power back-off. For high efficiency both at maximum output power and at power back-off, non-isolating power combiners are required. In this work the linearity of OEPAs using nonisolating power combiners is studied theoretically and validated by measurement of a 1.8GHz 20dBm OEPA implemented in a standard 65nm CMOS technology using an off-chip transmissionline based combiner. The developed theoretical model for the linearity is then employed to define digital pre-distortion (DPD) parameters for the implemented OEPA. Using this theory-based DPD and without any AM/AM and AM/PM characterizations, -31dB RMS EVM level and below -30dB ACLR were measured for a 13.1dBm 6.25MHz 30Mbit/s 7dB PAPR 64QAM signal with 41.8% drain efficiency and 33.6% power added efficiency.

Original language	English
Article number	8502839
Pages (from-to)	1149-1153
Number of pages	5
Journal	IEEE transactions on circuits and systems II: express briefs
Volume	66
Issue number	7
Early online date	23 Oct 2018
DOIs	https://doi.org/10.1109/TCSII.2018.2877708
Publication status	Published - 1 Jul 2019

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title = "A +20dBm highly efficient linear outphasing Class-E PA without AM/AM and AM/PM characterization requirements",

abstract = "Outphasing Class-E Power Amplifiers (OEPAs) using isolating power combiners and an inverse cosine signal component separator are inherently linear but suffer from low efficiency at power back-off. For high efficiency both at maximum output power and at power back-off, non-isolating power combiners are required. In this work the linearity of OEPAs using nonisolating power combiners is studied theoretically and validated by measurement of a 1.8GHz 20dBm OEPA implemented in a standard 65nm CMOS technology using an off-chip transmissionline based combiner. The developed theoretical model for the linearity is then employed to define digital pre-distortion (DPD) parameters for the implemented OEPA. Using this theory-based DPD and without any AM/AM and AM/PM characterizations, -31dB RMS EVM level and below -30dB ACLR were measured for a 13.1dBm 6.25MHz 30Mbit/s 7dB PAPR 64QAM signal with 41.8% drain efficiency and 33.6% power added efficiency.",

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N2 - Outphasing Class-E Power Amplifiers (OEPAs) using isolating power combiners and an inverse cosine signal component separator are inherently linear but suffer from low efficiency at power back-off. For high efficiency both at maximum output power and at power back-off, non-isolating power combiners are required. In this work the linearity of OEPAs using nonisolating power combiners is studied theoretically and validated by measurement of a 1.8GHz 20dBm OEPA implemented in a standard 65nm CMOS technology using an off-chip transmissionline based combiner. The developed theoretical model for the linearity is then employed to define digital pre-distortion (DPD) parameters for the implemented OEPA. Using this theory-based DPD and without any AM/AM and AM/PM characterizations, -31dB RMS EVM level and below -30dB ACLR were measured for a 13.1dBm 6.25MHz 30Mbit/s 7dB PAPR 64QAM signal with 41.8% drain efficiency and 33.6% power added efficiency.

AB - Outphasing Class-E Power Amplifiers (OEPAs) using isolating power combiners and an inverse cosine signal component separator are inherently linear but suffer from low efficiency at power back-off. For high efficiency both at maximum output power and at power back-off, non-isolating power combiners are required. In this work the linearity of OEPAs using nonisolating power combiners is studied theoretically and validated by measurement of a 1.8GHz 20dBm OEPA implemented in a standard 65nm CMOS technology using an off-chip transmissionline based combiner. The developed theoretical model for the linearity is then employed to define digital pre-distortion (DPD) parameters for the implemented OEPA. Using this theory-based DPD and without any AM/AM and AM/PM characterizations, -31dB RMS EVM level and below -30dB ACLR were measured for a 13.1dBm 6.25MHz 30Mbit/s 7dB PAPR 64QAM signal with 41.8% drain efficiency and 33.6% power added efficiency.

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A +20dBm highly efficient linear outphasing Class-E PA without AM/AM and AM/PM characterization requirements

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Load-mismatch sensitivity of class-E power amplifiers

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