A 2.4GHz 830pJ/bit duty-cycled wake-up receiver with -82dBm sensitivity for crystal-less wireless sensor nodes

S. Drago, D.M.W. Leenaerts, F. Sebastiano, L.J. Breems, K.A.A. Makinwa, Bram Nauta

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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    Abstract

    Abstract A 65 nm CMOS 2.4 GHz wake-up receiver operating with low-accuracy frequency references has been realized. Robustness to frequency inaccuracy is achieved by employing non-coherent energy detection, broadband-IF heterodyne architecture and impulse-radio modulation. The radio dissipates 415 ¿W at 500 kb/s and achieves a sensitivity of -82 dBm with an energy efficiency of 830 pJ/bit.
    Original languageEnglish
    Title of host publicationSolid-State Circuits Conference Digest of Technical Papers (ISSCC) 2010 IEEE International
    Place of PublicationPiscataway
    PublisherIEEE Circuits and Systems Society
    Pages224-225
    Number of pages2
    ISBN (Print)978-1-4244-6033-5
    DOIs
    Publication statusPublished - 7 Feb 2010
    EventIEEE International Solid-State Circuits Conference, ISSCC 2010 - San Francisco, United States
    Duration: 7 Feb 201011 Feb 2010

    Conference

    ConferenceIEEE International Solid-State Circuits Conference, ISSCC 2010
    Abbreviated titleISSCC
    CountryUnited States
    CitySan Francisco
    Period7/02/1011/02/10

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    Keywords

    • METIS-270776
    • EWI-17750
    • IR-72397

    Cite this

    Drago, S., Leenaerts, D. M. W., Sebastiano, F., Breems, L. J., Makinwa, K. A. A., & Nauta, B. (2010). A 2.4GHz 830pJ/bit duty-cycled wake-up receiver with -82dBm sensitivity for crystal-less wireless sensor nodes. In Solid-State Circuits Conference Digest of Technical Papers (ISSCC) 2010 IEEE International (pp. 224-225). Piscataway: IEEE Circuits and Systems Society. https://doi.org/10.1109/ISSCC.2010.5433955