This paper presents a monolithic optical detector, consisting of an integrated photodiode and a preamplifier in a standard 0.18-μm CMOS technology. A data rate of 3 Gb/s at BER <10-11 was achieved for λ=850 nm with 25-μW peak-peak optical power. This data rate is more than four times than that of current state-of-the-art optical detectors in standard CMOS reported so far. High-speed operation is achieved without reducing circuit responsivity by using an inherently robust analog equalizer that compensates (in gain and phase) for the photodiode roll-off over more than three decades. The presented solution is applicable to various photodiode structures, wavelengths, and CMOS generations.
|Number of pages||12|
|Journal||IEEE journal of solid-state circuits|
|Publication status||Published - Aug 2005|
- optical communication
- CMOS analog integrated circuits
- robustness issues
- optical receivers