Abstract
This paper presents a monolithic optical detector, consisting of an integrated photodiode and a preamplifier in a standard 0.18-μm CMOS technology. A data rate of 3 Gb/s at BER <10-11 was achieved for λ=850 nm with 25-μW peak-peak optical power. This data rate is more than four times than that of current state-of-the-art optical detectors in standard CMOS reported so far. High-speed operation is achieved without reducing circuit responsivity by using an inherently robust analog equalizer that compensates (in gain and phase) for the photodiode roll-off over more than three decades. The presented solution is applicable to various photodiode structures, wavelengths, and CMOS generations.
Original language | English |
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Pages (from-to) | 1706-1717 |
Number of pages | 12 |
Journal | IEEE journal of solid-state circuits |
Volume | 40 |
Issue number | 8 |
DOIs | |
Publication status | Published - Aug 2005 |
Keywords
- Data-communication
- photodiodes
- equalizers
- optical communication
- CMOS analog integrated circuits
- METIS-224203
- EWI-14502
- robustness issues
- IR-52582
- optical receivers