A 3 Gb/s optical detector standard 0.18μm CMOS

S. Radovanovic; Anne J. Annema; Bram Nauta

A 3 Gb/s optical detector standard 0.18μm CMOS

S. Radovanovic, Anne J. Annema, Bram Nauta

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic

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Abstract

This paper presents a monolithic optical detector, consisting of an integrated photodiode and a pre-amplifier in a standard 0.18μm CMOS technology. 3Gb/s data-rate was achieved at λ=850nm with an average optical power of 25 μW and BER10-11. This data-rate is over half an order of magnitude higher than that of current state-of-the-art optical detectors in standard CMOS. High speed operation is achieved without reducing circuit responsivity by using an inherently robust analog equalizer that compensates (in gain and phase) for the photodiode roll-off in the range from 1 MHz to 1 GHz. The presented solution is applicable to various photodiode structures, wavelengths and CMOS generations.

Original language	Undefined
Title of host publication	the 15th ProRisc workshop on Circuits, Systems and Signal Processing (ProRisc 2004)
Place of Publication	Utrecht
Publisher	STW
Pages	573-576
Number of pages	4
ISBN (Print)	90-73461-43-X
Publication status	Published - Nov 2004
Event	15th Annual Workshop on Circuits, Systems and Signal Processing, ProRisc 2004 - Veldhoven, Netherlands Duration: 25 Nov 2004 → 26 Nov 2004 Conference number: 15

Publication series

Name
Publisher	STW Technology Foundation

Conference

Conference	15th Annual Workshop on Circuits, Systems and Signal Processing, ProRisc 2004
Abbreviated title	ProRisc
Country/Territory	Netherlands
City	Veldhoven
Period	25/11/04 → 26/11/04

Keywords

METIS-219831
EWI-14495
robust design
Optical communications
equalizer
High speed
CMOS
IR-48403

Access to Document

Radovanovic04optical

http://eprints.eemcs.utwente.nl/secure2/14495/01/radovanovic.pdf

Cite this

@inproceedings{bc1249664f684fc38c16fdec4101908e,

title = "A 3 Gb/s optical detector standard 0.18μm CMOS",

abstract = "This paper presents a monolithic optical detector, consisting of an integrated photodiode and a pre-amplifier in a standard 0.18μm CMOS technology. 3Gb/s data-rate was achieved at λ=850nm with an average optical power of 25 μW and BER10-11. This data-rate is over half an order of magnitude higher than that of current state-of-the-art optical detectors in standard CMOS. High speed operation is achieved without reducing circuit responsivity by using an inherently robust analog equalizer that compensates (in gain and phase) for the photodiode roll-off in the range from 1 MHz to 1 GHz. The presented solution is applicable to various photodiode structures, wavelengths and CMOS generations.",

keywords = "METIS-219831, EWI-14495, robust design, Optical communications, equalizer, High speed, CMOS, IR-48403",

author = "S. Radovanovic and Annema, {Anne J.} and Bram Nauta",

year = "2004",

month = nov,

language = "Undefined",

isbn = "90-73461-43-X",

publisher = "STW",

pages = "573--576",

booktitle = "the 15th ProRisc workshop on Circuits, Systems and Signal Processing (ProRisc 2004)",

note = "null ; Conference date: 25-11-2004 Through 26-11-2004",

}

Radovanovic, S, Annema, AJ & Nauta, B 2004, A 3 Gb/s optical detector standard 0.18μm CMOS. in the 15th ProRisc workshop on Circuits, Systems and Signal Processing (ProRisc 2004). STW, Utrecht, pp. 573-576, 15th Annual Workshop on Circuits, Systems and Signal Processing, ProRisc 2004, Veldhoven, Netherlands, 25/11/04. <http://eprints.eemcs.utwente.nl/secure2/14495/01/radovanovic.pdf>

TY - GEN

T1 - A 3 Gb/s optical detector standard 0.18μm CMOS

AU - Radovanovic, S.

AU - Annema, Anne J.

AU - Nauta, Bram

N1 - Conference code: 15

PY - 2004/11

Y1 - 2004/11

N2 - This paper presents a monolithic optical detector, consisting of an integrated photodiode and a pre-amplifier in a standard 0.18μm CMOS technology. 3Gb/s data-rate was achieved at λ=850nm with an average optical power of 25 μW and BER10-11. This data-rate is over half an order of magnitude higher than that of current state-of-the-art optical detectors in standard CMOS. High speed operation is achieved without reducing circuit responsivity by using an inherently robust analog equalizer that compensates (in gain and phase) for the photodiode roll-off in the range from 1 MHz to 1 GHz. The presented solution is applicable to various photodiode structures, wavelengths and CMOS generations.

AB - This paper presents a monolithic optical detector, consisting of an integrated photodiode and a pre-amplifier in a standard 0.18μm CMOS technology. 3Gb/s data-rate was achieved at λ=850nm with an average optical power of 25 μW and BER10-11. This data-rate is over half an order of magnitude higher than that of current state-of-the-art optical detectors in standard CMOS. High speed operation is achieved without reducing circuit responsivity by using an inherently robust analog equalizer that compensates (in gain and phase) for the photodiode roll-off in the range from 1 MHz to 1 GHz. The presented solution is applicable to various photodiode structures, wavelengths and CMOS generations.

KW - METIS-219831

KW - EWI-14495

KW - robust design

KW - Optical communications

KW - equalizer

KW - High speed

KW - CMOS

KW - IR-48403

M3 - Conference contribution

SN - 90-73461-43-X

SP - 573

EP - 576

BT - the 15th ProRisc workshop on Circuits, Systems and Signal Processing (ProRisc 2004)

PB - STW

CY - Utrecht

Y2 - 25 November 2004 through 26 November 2004

ER -