A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications

F. Houfaf; Mathieu Egot; Andreas Kaiser; Andreia Cathelin; Bram Nauta

doi:10.1109/ISSCC.2012.6177052

A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications

F. Houfaf
, Mathieu Egot
, Andreas Kaiser
, Andreia Cathelin
, Bram Nauta

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

44 Citations (Scopus)

425 Downloads (Pure)

Abstract

In this work the Gm-C topology is adopted for its merits at high frequencies. In this technique, two critical parameters should be accounted for: the accuracy of the Q factors of the pole pairs (for correct transfer function) and parasitic capacitances (for maximal cut-off frequency). The former point is influenced by the phase shift of the integrators compounding the filter in the neighborhood of the filter's edge frequency. This phase error is due to two antagonistic effects which are the integrator's finite DC gain and its high-frequency poles/zeros.

Original language	English
Title of host publication	IEEE International Solid-State Circuits Conference Digest of Technical Papers, ISSCC 2012
Place of Publication	Piscataway
Publisher	IEEE
Pages	362-364
Number of pages	3
ISBN (Print)	978-1-4673-0376-7
DOIs	https://doi.org/10.1109/ISSCC.2012.6177052
Publication status	Published - 19 Feb 2012
Event	IEEE International Solid-State Circuits Conference, ISSCC 2012 - San Francisco, United States Duration: 19 Feb 2012 → 23 Feb 2012

Conference

Conference	IEEE International Solid-State Circuits Conference, ISSCC 2012
Abbreviated title	ISSCC
Country/Territory	United States
City	San Francisco
Period	19/02/12 → 23/02/12

Keywords

IR-80241
EWI-21783
METIS-286335

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10.1109/ISSCC.2012.6177052

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title = "A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications",

abstract = "In this work the Gm-C topology is adopted for its merits at high frequencies. In this technique, two critical parameters should be accounted for: the accuracy of the Q factors of the pole pairs (for correct transfer function) and parasitic capacitances (for maximal cut-off frequency). The former point is influenced by the phase shift of the integrators compounding the filter in the neighborhood of the filter's edge frequency. This phase error is due to two antagonistic effects which are the integrator's finite DC gain and its high-frequency poles/zeros.",

keywords = "IR-80241, EWI-21783, METIS-286335",

author = "F. Houfaf and Mathieu Egot and Andreas Kaiser and Andreia Cathelin and Bram Nauta",

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day = "19",

doi = "10.1109/ISSCC.2012.6177052",

language = "English",

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pages = "362--364",

booktitle = "IEEE International Solid-State Circuits Conference Digest of Technical Papers, ISSCC 2012",

publisher = "IEEE",

address = "United States",

note = "IEEE International Solid-State Circuits Conference, ISSCC 2012, ISSCC ; Conference date: 19-02-2012 Through 23-02-2012",

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Houfaf, F, Egot, M, Kaiser, A, Cathelin, A & Nauta, B 2012, A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications. in IEEE International Solid-State Circuits Conference Digest of Technical Papers, ISSCC 2012. IEEE, Piscataway, pp. 362-364, IEEE International Solid-State Circuits Conference, ISSCC 2012, San Francisco, California, United States, 19/02/12. https://doi.org/10.1109/ISSCC.2012.6177052

A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications. / Houfaf, F.; Egot, Mathieu; Kaiser, Andreas et al.
IEEE International Solid-State Circuits Conference Digest of Technical Papers, ISSCC 2012. Piscataway: IEEE, 2012. p. 362-364.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications

AU - Houfaf, F.

AU - Egot, Mathieu

AU - Kaiser, Andreas

AU - Cathelin, Andreia

AU - Nauta, Bram

PY - 2012/2/19

Y1 - 2012/2/19

N2 - In this work the Gm-C topology is adopted for its merits at high frequencies. In this technique, two critical parameters should be accounted for: the accuracy of the Q factors of the pole pairs (for correct transfer function) and parasitic capacitances (for maximal cut-off frequency). The former point is influenced by the phase shift of the integrators compounding the filter in the neighborhood of the filter's edge frequency. This phase error is due to two antagonistic effects which are the integrator's finite DC gain and its high-frequency poles/zeros.

AB - In this work the Gm-C topology is adopted for its merits at high frequencies. In this technique, two critical parameters should be accounted for: the accuracy of the Q factors of the pole pairs (for correct transfer function) and parasitic capacitances (for maximal cut-off frequency). The former point is influenced by the phase shift of the integrators compounding the filter in the neighborhood of the filter's edge frequency. This phase error is due to two antagonistic effects which are the integrator's finite DC gain and its high-frequency poles/zeros.

KW - IR-80241

KW - EWI-21783

KW - METIS-286335

U2 - 10.1109/ISSCC.2012.6177052

DO - 10.1109/ISSCC.2012.6177052

M3 - Conference contribution

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BT - IEEE International Solid-State Circuits Conference Digest of Technical Papers, ISSCC 2012

PB - IEEE

CY - Piscataway

T2 - IEEE International Solid-State Circuits Conference, ISSCC 2012

Y2 - 19 February 2012 through 23 February 2012

ER -

A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications

Abstract

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Keywords

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