A Baseband-Matching-Resistor Noise-Canceling Receiver Architecture to Increase In-Band Linearity Achieving 175MHz TIA Bandwidth with a 3-Stage Inverter-Only OpAmp

Anoop Narayan Bhat, Ronan A.R. van der Zee, Salvatore Finocchiaro, Francesco Dantoni, Bram Nauta

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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    Abstract

    Abstract—In this paper we propose a baseband noise-canceling receiver architecture to increase in-band linearity. Key feature of the architecture is that all active circuits are in baseband, including the LNTA. The receiver targets high IF bandwidths, enabled by a TIA composed of an OpAmp using only inverters. The receiver is fabricated in 22nm FDSOI CMOS. Measured results show an in-band IIP3 of > 9dBm for an IF bandwidth of 175MHz with sub-5dB NF across 1-6GHz LO.
    Original languageEnglish
    Title of host publicationIEEE Radio Frequency Integrated Circuits Symposium, Boston, Massachusetts 2019
    Place of PublicationBoston, Massachusetst, US
    PublisherIEEE
    Pages155-158
    Number of pages4
    ISBN (Electronic)978-1-7281-1701-0
    DOIs
    Publication statusPublished - 3 Jun 2019
    EventIEEE Radio Frequency Integrated Circuits Symposium 2019 - Boston Convention and Exhibition Center, Boston, United States
    Duration: 2 Jun 20194 Jun 2019

    Conference

    ConferenceIEEE Radio Frequency Integrated Circuits Symposium 2019
    Abbreviated titleRFIC 2019
    CountryUnited States
    CityBoston
    Period2/06/194/06/19

    Fingerprint

    Operational amplifiers
    Resistors
    Bandwidth
    Networks (circuits)

    Keywords

    • Base-station
    • in-band linearity
    • noise canceling
    • wide band IF
    • inverters-only OpAmp
    • TIA
    • LNTA
    • IIP3

    Cite this

    Bhat, A. N., van der Zee, R. A. R., Finocchiaro, S., Dantoni, F., & Nauta, B. (2019). A Baseband-Matching-Resistor Noise-Canceling Receiver Architecture to Increase In-Band Linearity Achieving 175MHz TIA Bandwidth with a 3-Stage Inverter-Only OpAmp. In IEEE Radio Frequency Integrated Circuits Symposium, Boston, Massachusetts 2019 (pp. 155-158). Boston, Massachusetst, US: IEEE. https://doi.org/10.1109/RFIC.2019.8701843
    Bhat, Anoop Narayan ; van der Zee, Ronan A.R. ; Finocchiaro, Salvatore ; Dantoni, Francesco ; Nauta, Bram . / A Baseband-Matching-Resistor Noise-Canceling Receiver Architecture to Increase In-Band Linearity Achieving 175MHz TIA Bandwidth with a 3-Stage Inverter-Only OpAmp. IEEE Radio Frequency Integrated Circuits Symposium, Boston, Massachusetts 2019. Boston, Massachusetst, US : IEEE, 2019. pp. 155-158
    @inproceedings{8a71b9b603c746eb9cf4f0f4bed32c11,
    title = "A Baseband-Matching-Resistor Noise-Canceling Receiver Architecture to Increase In-Band Linearity Achieving 175MHz TIA Bandwidth with a 3-Stage Inverter-Only OpAmp",
    abstract = "Abstract—In this paper we propose a baseband noise-canceling receiver architecture to increase in-band linearity. Key feature of the architecture is that all active circuits are in baseband, including the LNTA. The receiver targets high IF bandwidths, enabled by a TIA composed of an OpAmp using only inverters. The receiver is fabricated in 22nm FDSOI CMOS. Measured results show an in-band IIP3 of > 9dBm for an IF bandwidth of 175MHz with sub-5dB NF across 1-6GHz LO.",
    keywords = "Base-station, in-band linearity, noise canceling, wide band IF, inverters-only OpAmp, TIA, LNTA, IIP3",
    author = "Bhat, {Anoop Narayan} and {van der Zee}, {Ronan A.R.} and Salvatore Finocchiaro and Francesco Dantoni and Bram Nauta",
    year = "2019",
    month = "6",
    day = "3",
    doi = "10.1109/RFIC.2019.8701843",
    language = "English",
    pages = "155--158",
    booktitle = "IEEE Radio Frequency Integrated Circuits Symposium, Boston, Massachusetts 2019",
    publisher = "IEEE",
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    Bhat, AN, van der Zee, RAR, Finocchiaro, S, Dantoni, F & Nauta, B 2019, A Baseband-Matching-Resistor Noise-Canceling Receiver Architecture to Increase In-Band Linearity Achieving 175MHz TIA Bandwidth with a 3-Stage Inverter-Only OpAmp. in IEEE Radio Frequency Integrated Circuits Symposium, Boston, Massachusetts 2019. IEEE, Boston, Massachusetst, US, pp. 155-158, IEEE Radio Frequency Integrated Circuits Symposium 2019, Boston, United States, 2/06/19. https://doi.org/10.1109/RFIC.2019.8701843

    A Baseband-Matching-Resistor Noise-Canceling Receiver Architecture to Increase In-Band Linearity Achieving 175MHz TIA Bandwidth with a 3-Stage Inverter-Only OpAmp. / Bhat, Anoop Narayan; van der Zee, Ronan A.R.; Finocchiaro, Salvatore; Dantoni, Francesco; Nauta, Bram .

    IEEE Radio Frequency Integrated Circuits Symposium, Boston, Massachusetts 2019. Boston, Massachusetst, US : IEEE, 2019. p. 155-158.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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    N2 - Abstract—In this paper we propose a baseband noise-canceling receiver architecture to increase in-band linearity. Key feature of the architecture is that all active circuits are in baseband, including the LNTA. The receiver targets high IF bandwidths, enabled by a TIA composed of an OpAmp using only inverters. The receiver is fabricated in 22nm FDSOI CMOS. Measured results show an in-band IIP3 of > 9dBm for an IF bandwidth of 175MHz with sub-5dB NF across 1-6GHz LO.

    AB - Abstract—In this paper we propose a baseband noise-canceling receiver architecture to increase in-band linearity. Key feature of the architecture is that all active circuits are in baseband, including the LNTA. The receiver targets high IF bandwidths, enabled by a TIA composed of an OpAmp using only inverters. The receiver is fabricated in 22nm FDSOI CMOS. Measured results show an in-band IIP3 of > 9dBm for an IF bandwidth of 175MHz with sub-5dB NF across 1-6GHz LO.

    KW - Base-station

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    Bhat AN, van der Zee RAR, Finocchiaro S, Dantoni F, Nauta B. A Baseband-Matching-Resistor Noise-Canceling Receiver Architecture to Increase In-Band Linearity Achieving 175MHz TIA Bandwidth with a 3-Stage Inverter-Only OpAmp. In IEEE Radio Frequency Integrated Circuits Symposium, Boston, Massachusetts 2019. Boston, Massachusetst, US: IEEE. 2019. p. 155-158 https://doi.org/10.1109/RFIC.2019.8701843