A breakdown voltage model for implanted resurf p-LDMOS device on n+ buried layer

Ming-Jiang Zhou; A. Van Calster

doi:10.1016/0038-1101(94)90196-1

A breakdown voltage model for implanted resurf p-LDMOS device on n+ buried layer

Ming-Jiang Zhou, A. Van Calster

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Abstract

This paper presents an analytical expression of the breakdown voltage of a high voltage implanted RESURF p-LDMOS device which uses the n+ buried layer as an effective device substrate. In this model, the doping profile of the buried layer is considered and discussed. The implant dose for the drift region to implement the RESURF principle is also described by this model. Results calculated from this model are verified by experimental values.

Original language	English
Pages (from-to)	1383-1385
Journal	Solid-state electronics
Volume	30
Issue number	7
DOIs	https://doi.org/10.1016/0038-1101(94)90196-1
Publication status	Published - 1994

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@article{2922fec28853407198ca7296b1e9b39b,

title = "A breakdown voltage model for implanted resurf p-LDMOS device on n+ buried layer",

abstract = "This paper presents an analytical expression of the breakdown voltage of a high voltage implanted RESURF p-LDMOS device which uses the n+ buried layer as an effective device substrate. In this model, the doping profile of the buried layer is considered and discussed. The implant dose for the drift region to implement the RESURF principle is also described by this model. Results calculated from this model are verified by experimental values.",

author = "Ming-Jiang Zhou and {Van Calster}, A.",

year = "1994",

doi = "10.1016/0038-1101(94)90196-1",

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volume = "30",

pages = "1383--1385",

journal = "Solid-state electronics",

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publisher = "Elsevier Ltd",

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T1 - A breakdown voltage model for implanted resurf p-LDMOS device on n+ buried layer

AU - Zhou, Ming-Jiang

AU - Van Calster, A.

PY - 1994

Y1 - 1994

N2 - This paper presents an analytical expression of the breakdown voltage of a high voltage implanted RESURF p-LDMOS device which uses the n+ buried layer as an effective device substrate. In this model, the doping profile of the buried layer is considered and discussed. The implant dose for the drift region to implement the RESURF principle is also described by this model. Results calculated from this model are verified by experimental values.

AB - This paper presents an analytical expression of the breakdown voltage of a high voltage implanted RESURF p-LDMOS device which uses the n+ buried layer as an effective device substrate. In this model, the doping profile of the buried layer is considered and discussed. The implant dose for the drift region to implement the RESURF principle is also described by this model. Results calculated from this model are verified by experimental values.

U2 - 10.1016/0038-1101(94)90196-1

DO - 10.1016/0038-1101(94)90196-1

M3 - Article

SN - 0038-1101

VL - 30

SP - 1383

EP - 1385

JO - Solid-state electronics

JF - Solid-state electronics

IS - 7

ER -

A breakdown voltage model for implanted resurf p-LDMOS device on n+ buried layer

Abstract

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