A cmos compatible process for improved rf performance on highly doped substrates

L.J. Fernandez, Uwe Arz, Dirk Schubert, Johan W. Berenschot, Remco J. Wiegerink, Jakob Flokstra

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In this paper we present a CMOS compatible process for CMOS-grade wafers in order to create specific areas where radio frequency (RF) devices can be implemented without the high losses associated to this substrate. The process is based on refilling of deep trenches, which allows the local replacement of the silicon substrate by silicon nitride, which has very good RF properties (tan /spl delta/ = 5-9 10/sup -4/). The trenches are in the order of 30 /spl mu/m deep and 2 /spl mu/m wide, leaving a space of 2 /spl mu/m in between where the silicon still remains. In this way, half of the lossy substrate is replaced by silicon nitride. We present measurement results which indicate that the RF performance of CMOS-grade wafers can be significantly improved, as well as a careful study of the most relevant fabrication parameters and the consequences for the final RF performance of the substrate. An additional advantage of this new technique is the possibility of using it as a pre-CMOS process, thus allowing monolithic integration of CMOS electronics and RF and microwave components.
Original languageUndefined
Title of host publicationProceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.
Place of PublicationLos Alamitos
Number of pages4
ISBN (Print)0-7803-9054-7
Publication statusPublished - May 2005
Event9th IEEE Workshop on Signal Propagation on Interconnects, 2005 - Garmisch-Partenkirchen, Germany
Duration: 10 May 200513 May 2005

Publication series



Workshop9th IEEE Workshop on Signal Propagation on Interconnects, 2005
Other10-13 May 2005


  • EWI-10294
  • METIS-228536
  • IR-54401

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