A CMOS Wideband Linear Current Attenuator with Electronically Variable Gain

Remco J. Wiegerink

doi:10.1109/ISCAS.1993.393883

A CMOS Wideband Linear Current Attenuator with Electronically Variable Gain

Remco J. Wiegerink

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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Abstract

A CMOS highly linear current attenuator is described. The circuit is suited for both differential and single input currents. The current gain is electronically variable between -1 and +1 by means of two controlling currents. A simple additional circuit is described to obtain a gain that is linearly dependent on a single control current. The circuit can be used as a four-quadrant current multiplier. The current attenuator is realized in a standard 2.5 μm CMOS process using channel lengths of 5 μm. The measured nonlinearity is less than 1% over the entire input current range. Simulations indicate a feasible -3dB bandwidth of over 100 MHz.

Original language	Undefined
Title of host publication	Proceedings International Symposium on Circuits and Systems (ISCAS '93)
Place of Publication	Chicago, Illinois
Publisher	IEEE
Pages	962-965
ISBN (Print)	9780780312548
DOIs	https://doi.org/10.1109/ISCAS.1993.393883
Publication status	Published - 3 May 1993

Publication series

Name
Publisher	IEEE

Keywords

IR-15944
METIS-112826

Access to Document

10.1109/ISCAS.1993.393883

00692806
open

Cite this

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title = "A CMOS Wideband Linear Current Attenuator with Electronically Variable Gain",

abstract = "A CMOS highly linear current attenuator is described. The circuit is suited for both differential and single input currents. The current gain is electronically variable between -1 and +1 by means of two controlling currents. A simple additional circuit is described to obtain a gain that is linearly dependent on a single control current. The circuit can be used as a four-quadrant current multiplier. The current attenuator is realized in a standard 2.5 μm CMOS process using channel lengths of 5 μm. The measured nonlinearity is less than 1{\%} over the entire input current range. Simulations indicate a feasible -3dB bandwidth of over 100 MHz.",

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N2 - A CMOS highly linear current attenuator is described. The circuit is suited for both differential and single input currents. The current gain is electronically variable between -1 and +1 by means of two controlling currents. A simple additional circuit is described to obtain a gain that is linearly dependent on a single control current. The circuit can be used as a four-quadrant current multiplier. The current attenuator is realized in a standard 2.5 μm CMOS process using channel lengths of 5 μm. The measured nonlinearity is less than 1% over the entire input current range. Simulations indicate a feasible -3dB bandwidth of over 100 MHz.

AB - A CMOS highly linear current attenuator is described. The circuit is suited for both differential and single input currents. The current gain is electronically variable between -1 and +1 by means of two controlling currents. A simple additional circuit is described to obtain a gain that is linearly dependent on a single control current. The circuit can be used as a four-quadrant current multiplier. The current attenuator is realized in a standard 2.5 μm CMOS process using channel lengths of 5 μm. The measured nonlinearity is less than 1% over the entire input current range. Simulations indicate a feasible -3dB bandwidth of over 100 MHz.

KW - IR-15944

KW - METIS-112826

U2 - 10.1109/ISCAS.1993.393883

DO - 10.1109/ISCAS.1993.393883

M3 - Conference contribution

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EP - 965

BT - Proceedings International Symposium on Circuits and Systems (ISCAS '93)

PB - IEEE

CY - Chicago, Illinois

ER -