A CMOS highly linear current attenuator is described. The circuit is suited for both differential and single input currents. The current gain is electronically variable between -1 and +1 by means of two controlling currents. A simple additional circuit is described to obtain a gain that is linearly dependent on a single control current. The circuit can be used as a four-quadrant current multiplier. The current attenuator is realized in a standard 2.5 μm CMOS process using channel lengths of 5 μm. The measured nonlinearity is less than 1% over the entire input current range. Simulations indicate a feasible -3dB bandwidth of over 100 MHz.
|Conference||IEEE International Symposium on Circuits and Systems, ISCAS 1993|
|Period||3/05/93 → 6/05/93|
|Other||3-6 May 1993|