A Column Arrangement Algorithm for a Coarse-grained Reconfigurable Architecture

Y. Guo, C. Hoede

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Abstract

In a coarse-grained reconfigurable architecture, the functions of resources such as Arithmetic Logic Units (ALUs) can be reconfigured. Unlike the programmability of a general purpose processor, the programmability of a coarse-grained reconfigurable architecture is limited. The limitation might be the number of different patterns or the number of different configurations of each ALU. This paper presents a column arrangement algorithm to sort the elements of patterns to reduce the number of configurations of each reconfigurable ALU. The experimental results show that this algorithm leads to nearly optimal results.
Original languageUndefined
Title of host publicationProceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'06)
EditorsT.P. Plaks, R. DeMara, M. Gokhale, S. Guccione, M. Platzner, Gerardus Johannes Maria Smit, M. Wirthlin
Place of PublicationUSA
PublisherCSREA Press
Pages117-122
Number of pages6
ISBN (Print)1-932415-74-2
Publication statusPublished - Jun 2006
Event2005 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA '05 - Las Vegas, Nevada, USA, Las Vegas, United States
Duration: 27 Jun 200530 Jun 2005

Publication series

Name
PublisherCSREA Press
Number2

Conference

Conference2005 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA '05
Abbreviated titleERSA
Country/TerritoryUnited States
CityLas Vegas
Period27/06/0530/06/05
Other27-30 Jun 2005

Keywords

  • EWI-6956
  • IR-66370
  • METIS-238180
  • CAES-EEA: Efficient Embedded Architectures

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