### Abstract

Original language | Undefined |
---|---|

Title of host publication | Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'06) |

Editors | T.P. Plaks, R. DeMara, M. Gokhale, S. Guccione, M. Platzner, Gerardus Johannes Maria Smit, M. Wirthlin |

Place of Publication | USA |

Publisher | CSREA Press |

Pages | 117-122 |

Number of pages | 6 |

ISBN (Print) | 1-932415-74-2 |

Publication status | Published - Jun 2006 |

Event | 2005 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA '05 - Las Vegas, Nevada, USA, Las Vegas, United States Duration: 27 Jun 2005 → 30 Jun 2005 |

### Publication series

Name | |
---|---|

Publisher | CSREA Press |

Number | 2 |

### Conference

Conference | 2005 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA '05 |
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Abbreviated title | ERSA |

Country | United States |

City | Las Vegas |

Period | 27/06/05 → 30/06/05 |

Other | 27-30 Jun 2005 |

### Keywords

- EWI-6956
- IR-66370
- METIS-238180
- CAES-EEA: Efficient Embedded Architectures

### Cite this

*Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'06)*(pp. 117-122). USA: CSREA Press.

}

*Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'06).*CSREA Press, USA, pp. 117-122, 2005 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA '05, Las Vegas, United States, 27/06/05.

**A Column Arrangement Algorithm for a Coarse-grained Reconfigurable Architecture.** / Guo, Y.; Hoede, C.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - A Column Arrangement Algorithm for a Coarse-grained Reconfigurable Architecture

AU - Guo, Y.

AU - Hoede, C.

PY - 2006/6

Y1 - 2006/6

N2 - In a coarse-grained reconfigurable architecture, the functions of resources such as Arithmetic Logic Units (ALUs) can be reconfigured. Unlike the programmability of a general purpose processor, the programmability of a coarse-grained reconfigurable architecture is limited. The limitation might be the number of different patterns or the number of different configurations of each ALU. This paper presents a column arrangement algorithm to sort the elements of patterns to reduce the number of configurations of each reconfigurable ALU. The experimental results show that this algorithm leads to nearly optimal results.

AB - In a coarse-grained reconfigurable architecture, the functions of resources such as Arithmetic Logic Units (ALUs) can be reconfigured. Unlike the programmability of a general purpose processor, the programmability of a coarse-grained reconfigurable architecture is limited. The limitation might be the number of different patterns or the number of different configurations of each ALU. This paper presents a column arrangement algorithm to sort the elements of patterns to reduce the number of configurations of each reconfigurable ALU. The experimental results show that this algorithm leads to nearly optimal results.

KW - EWI-6956

KW - IR-66370

KW - METIS-238180

KW - CAES-EEA: Efficient Embedded Architectures

M3 - Conference contribution

SN - 1-932415-74-2

SP - 117

EP - 122

BT - Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'06)

A2 - Plaks, T.P.

A2 - DeMara, R.

A2 - Gokhale, M.

A2 - Guccione, S.

A2 - Platzner, M.

A2 - Smit, Gerardus Johannes Maria

A2 - Wirthlin, M.

PB - CSREA Press

CY - USA

ER -