A design for testability expert system for silicon compilers

R.P. van Riessen; R.P. van Riessen; Hans G. Kerkhoff; J.M.J. Janssen

doi:10.1109/VTEST.1991.208125

A design for testability expert system for silicon compilers

R.P. van Riessen, R.P. van Riessen, Hans G. Kerkhoff, J.M.J. Janssen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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Abstract

This paper describes a design-for-testability expert system for the selection of the most appropriate test method for every macro within an IC. The interface with the system designer is user-friendly and together with an efficient search mechanism this expert system can be used as a framework for all types of macros. This tool will be used in a self-test compiler, which generates the layout of self-testable macros automatically. The self-test compiler can be part of a silicon compilation system and thus contribute to the integration of testability into the design process

Original language	Undefined
Title of host publication	Proceedings 9th Anual IEEE VLSI Test Symposium
Place of Publication	Atlantic City
Publisher	IEEE
Pages	10-15
Number of pages	0
DOIs	https://doi.org/10.1109/VTEST.1991.208125
Publication status	Published - 1 Apr 1991
Event	VLSI Test Symposium, VTS 1991 - Atlantic City, United States Duration: 15 Apr 1991 → 17 Apr 1991

Publication series

Name
Publisher	IEEE

Conference

Conference	VLSI Test Symposium, VTS 1991
Abbreviated title	VTS
Country/Territory	United States
City	Atlantic City
Period	15/04/91 → 17/04/91

Keywords

METIS-112968
IR-16084

Access to Document

10.1109/VTEST.1991.208125

design-for-testability_-_riessen

Cite this

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title = "A design for testability expert system for silicon compilers",

abstract = "This paper describes a design-for-testability expert system for the selection of the most appropriate test method for every macro within an IC. The interface with the system designer is user-friendly and together with an efficient search mechanism this expert system can be used as a framework for all types of macros. This tool will be used in a self-test compiler, which generates the layout of self-testable macros automatically. The self-test compiler can be part of a silicon compilation system and thus contribute to the integration of testability into the design process",

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AB - This paper describes a design-for-testability expert system for the selection of the most appropriate test method for every macro within an IC. The interface with the system designer is user-friendly and together with an efficient search mechanism this expert system can be used as a framework for all types of macros. This tool will be used in a self-test compiler, which generates the layout of self-testable macros automatically. The self-test compiler can be part of a silicon compilation system and thus contribute to the integration of testability into the design process

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