Abstract
Abstract
A passive switched capacitor RF band-pass filter with clock controlled center frequency is realized in 65nm CMOS. An off-chip transformer which acts as a balun, improves filter-Q and realizes impedance matching. The differential architecture reduces clock-leakage and suppresses selectivity around even harmonics of the clock. The filter has a constant -3dB bandwidth of 35MHz and can be tuned from 100MHz up to 1GHz. IIP3 is better than 19dBm, P1dB=2dBm and NF<;5.5dB at Pdiss=2mW to 16mW.
Original language | English |
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Title of host publication | IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2010) |
Place of Publication | USA |
Publisher | IEEE |
Pages | 299-302 |
Number of pages | 4 |
ISBN (Print) | 978-1-4244-6240-7 |
DOIs | |
Publication status | Published - 24 May 2010 |
Event | 2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010 - Anaheim Convention Center, Anaheim, United States Duration: 23 May 2010 → 25 May 2010 |
Conference
Conference | 2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010 |
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Abbreviated title | RFIC |
Country/Territory | United States |
City | Anaheim |
Period | 23/05/10 → 25/05/10 |
Keywords
- METIS-271064
- N-path filters
- Cognitive Radio
- CMOS bandpass filter
- Software Defined Radio
- EWI-18577
- commutated capacitor
- inductorless
- IR-73659