A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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Abstract

In this paper, critical path-delay time, and quiescent and transient power-supply current testing have been applied to a 90nm VLIW processor, to predict the remaining lifetime of this processor. The test environment for validation, via implementing an accelerated test has been realized. The resulting delay and current measurement data is presented next, followed by applying a genetic algorithm (GA) to construct a lifetime prediction model for the processor. The calculated remaining lifetime predicted by power-supply testing is close to that of delay-time testing.
Original languageUndefined
Title of host publicationInternational Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016
EditorsYong Zhao
Place of PublicationPiscataway, NJ, USA
PublisherIEEE Computer Society
Pages10-14
Number of pages4
ISBN (Print)978-1-5090-0336-5
DOIs
Publication statusPublished - 2 Jun 2016

Publication series

Name
PublisherIEEE Computer Society

Keywords

  • Aging
  • Genetic Algorithms
  • EC Grant Agreement nr.: FP7/619871
  • Delays
  • Current measurement
  • EWI-26387
  • Temperature measurement
  • Testing
  • METIS-318444
  • IR-101896
  • Degradation

Cite this

Kerkhoff, H. G. (2016). A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing. In Y. Zhao (Ed.), International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016 (pp. 10-14). Piscataway, NJ, USA: IEEE Computer Society. https://doi.org/10.1109/DTIS.2016.7483805
Kerkhoff, Hans G. / A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing. International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016. editor / Yong Zhao. Piscataway, NJ, USA : IEEE Computer Society, 2016. pp. 10-14
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abstract = "In this paper, critical path-delay time, and quiescent and transient power-supply current testing have been applied to a 90nm VLIW processor, to predict the remaining lifetime of this processor. The test environment for validation, via implementing an accelerated test has been realized. The resulting delay and current measurement data is presented next, followed by applying a genetic algorithm (GA) to construct a lifetime prediction model for the processor. The calculated remaining lifetime predicted by power-supply testing is close to that of delay-time testing.",
keywords = "Aging, Genetic Algorithms, EC Grant Agreement nr.: FP7/619871, Delays, Current measurement, EWI-26387, Temperature measurement, Testing, METIS-318444, IR-101896, Degradation",
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Kerkhoff, HG 2016, A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing. in Y Zhao (ed.), International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016. IEEE Computer Society, Piscataway, NJ, USA, pp. 10-14. https://doi.org/10.1109/DTIS.2016.7483805

A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing. / Kerkhoff, Hans G.

International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016. ed. / Yong Zhao. Piscataway, NJ, USA : IEEE Computer Society, 2016. p. 10-14.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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N2 - In this paper, critical path-delay time, and quiescent and transient power-supply current testing have been applied to a 90nm VLIW processor, to predict the remaining lifetime of this processor. The test environment for validation, via implementing an accelerated test has been realized. The resulting delay and current measurement data is presented next, followed by applying a genetic algorithm (GA) to construct a lifetime prediction model for the processor. The calculated remaining lifetime predicted by power-supply testing is close to that of delay-time testing.

AB - In this paper, critical path-delay time, and quiescent and transient power-supply current testing have been applied to a 90nm VLIW processor, to predict the remaining lifetime of this processor. The test environment for validation, via implementing an accelerated test has been realized. The resulting delay and current measurement data is presented next, followed by applying a genetic algorithm (GA) to construct a lifetime prediction model for the processor. The calculated remaining lifetime predicted by power-supply testing is close to that of delay-time testing.

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KW - EC Grant Agreement nr.: FP7/619871

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KW - Temperature measurement

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KW - IR-101896

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Kerkhoff HG. A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing. In Zhao Y, editor, International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016. Piscataway, NJ, USA: IEEE Computer Society. 2016. p. 10-14 https://doi.org/10.1109/DTIS.2016.7483805