### Abstract

Original language | Undefined |
---|---|

Title of host publication | Proceedings of LCTES 2003 |

Place of Publication | New York |

Publisher | Association for Computing Machinery (ACM) |

Pages | 199-208 |

Number of pages | 10 |

ISBN (Print) | 1-58113-647-1 |

DOIs | |

Publication status | Published - Jun 2003 |

### Publication series

Name | |
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Publisher | ACM |

### Keywords

- CAES-EEA: Efficient Embedded Architectures
- IR-46372
- EWI-1512
- METIS-214809

### Cite this

*Proceedings of LCTES 2003*(pp. 199-208). New York: Association for Computing Machinery (ACM). https://doi.org/10.1145/780732.780760

}

*Proceedings of LCTES 2003.*Association for Computing Machinery (ACM), New York, pp. 199-208. https://doi.org/10.1145/780732.780760

**A Graph Covering Algorithm for a Coarse Grain Reconfigurable System.** / Guo, Y.; Smit, Gerardus Johannes Maria; Heysters, P.M.; Broersma, Haitze J.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - A Graph Covering Algorithm for a Coarse Grain Reconfigurable System

AU - Guo, Y.

AU - Smit, Gerardus Johannes Maria

AU - Heysters, P.M.

AU - Broersma, Haitze J.

N1 - Imported from CHAMELEON.xml

PY - 2003/6

Y1 - 2003/6

N2 - The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a graph covering algorithm. The graph covering is done in two steps: template generation and template selection. The objective of template generation step is to extract functional equivalent structures, i.e. templates, from a control data flow graph. By inspecting the graph, the algorithm generates all the possible templates and the corresponding matches. Using unique serial numbers and circle numbers, the algorithm can find all distinct templates with multiple outputs. The template selection algorithm shows how this information can be used in compilers for reconfigurable systems. The objective of the template selection algorithm is to find an efficient cover for an application graph with a minimal number of distinct templates and minimal number of matches.

AB - The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a graph covering algorithm. The graph covering is done in two steps: template generation and template selection. The objective of template generation step is to extract functional equivalent structures, i.e. templates, from a control data flow graph. By inspecting the graph, the algorithm generates all the possible templates and the corresponding matches. Using unique serial numbers and circle numbers, the algorithm can find all distinct templates with multiple outputs. The template selection algorithm shows how this information can be used in compilers for reconfigurable systems. The objective of the template selection algorithm is to find an efficient cover for an application graph with a minimal number of distinct templates and minimal number of matches.

KW - CAES-EEA: Efficient Embedded Architectures

KW - IR-46372

KW - EWI-1512

KW - METIS-214809

U2 - 10.1145/780732.780760

DO - 10.1145/780732.780760

M3 - Conference contribution

SN - 1-58113-647-1

SP - 199

EP - 208

BT - Proceedings of LCTES 2003

PB - Association for Computing Machinery (ACM)

CY - New York

ER -