A high-density sea-of-gates architecture incorporating testability support

R.J.H. Koopman, R.J.H. Koopman, Hans G. Kerkhoff

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    Abstract

    The authors describe an efficient and flexible CMOS sea-of-gates architecture for digital applications. This architecture supports the design of integrated circuits at all important physical design areas such as performance, implementation, and wiring. After a detailed discussion of the three architectural sublevels-performance, implementation, and wiring-the sea-of-gates architecture is presented. The functionality of this architecture is illustrated by describing the design of some benchmark circuits
    Original languageUndefined
    Title of host publicationProceedings 1992 IEEE International Symposium on Circuits and Systems
    Place of PublicationSan Diego, U.S.A.
    PublisherIEEE
    Pages2977-2980
    Number of pages0
    ISBN (Print)9780780305106
    DOIs
    Publication statusPublished - 10 May 1992
    Event35th Midwest Symposium on Circuits and Systems, 1992 - Washington, DC
    Duration: 9 Aug 199212 Aug 1992

    Publication series

    Name
    PublisherIEEE
    Volume2

    Conference

    Conference35th Midwest Symposium on Circuits and Systems, 1992
    Period9/08/9212/08/92
    Other9-12 Aug. 1992

    Keywords

    • METIS-112960
    • IR-56062

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