A high-linearity CMOS receiver achieving +44dBm IIP3 and +13dBm B1dB for SAW-less LTE radio

Yuan-Ching Lien, Eric A.M. Klumperink, Bernard Tenbroek, Jon Strange, Bram Nauta

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    50 Citations (Scopus)
    1044 Downloads (Pure)


    LTE-advanced wireless receivers require high-linearity up-front filtering to prevent corruption of the in-band signals by strong out-of-band (OOB) signals and self-interference from the transmitter. SAW duplexer filters are generally used for this purpose, but supporting the plethora of existing and new bands becomes troublesome with separate filters for each band. In this paper we explore the possibility of combining an isolator with on-chip filtering. However, even with 15dB isolation, the on-chip filter needs to deal with up to +10dBm TX leakage and -15dBm OOB blocking, which requires an extremely high IIP3 around +50dBm and IIP2 around +90dBm. Recently inductorless tunable N-path-filter-based receivers achieved >10dBm compression point and good IIP3 of 20 to 30dBm. In order to further improve the receiver linearity to approach the extremely high IIP3 requirement for a SAW-less receiver, a high-linearity N-path bandpass/notch filter topology and receiver architecture are proposed in this paper.
    Original languageEnglish
    Title of host publicationSolid-State Circuits Conference (ISSCC), 2017 IEEE International
    Place of PublicationPiscataway USA
    ISBN (Electronic)2376-8606
    ISBN (Print)978-1-5090-3759-9
    Publication statusPublished - 8 Feb 2017
    EventIEEE International Solid- State Circuits Conference, ISSCC 2017 - San Francisco Marriott, San Francisco, United States
    Duration: 5 Feb 20179 Feb 2017


    ConferenceIEEE International Solid- State Circuits Conference, ISSCC 2017
    Abbreviated titleISSCC 2017
    CountryUnited States
    CitySan Francisco


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