A lattice representational definition of a hierarchy of instructional processors usable in educational courseware

I.P.F. de Diana, Hendrik J. Vos

Research output: Contribution to journalArticleAcademic

2 Citations (Scopus)
65 Downloads (Pure)

Abstract

The basic “recognize-act-recognize-end” cycle can be recognized in elementary as well as in more advanced forms of CAI. This article attempts to offer a unifying formal framework in which different elaborations of this cycle (embodied in a “processor”) can be placed. Three different levels of elaboration are distinguished which can be considered to be situated into the nodes of a lattice of models of the instructional process. A formal definition of such a framework can serve at least two functions. In the first place a uniform and precise definition of various elaborations can be given and new elaborations can be created in a logically funded way. Secondly, such a framework can support the modelling of instructional processes and the stimulation of student behavior. Thus, pre-testing of courseware could become feasible. Aspects of the framework have been used to implement two prototypes of support systems for the development of CAI courseware.
Original languageUndefined
Pages (from-to)427-434
JournalComputers & education
Volume12
Issue number3
DOIs
Publication statusPublished - 1988

Keywords

  • IR-68006

Cite this