A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses

Alessandro Palumbo; Luca Cassano; Pedro Reviriego; Giuseppe Bianchi; Marco Ottavi

doi:10.1109/DFT52944.2021.9568291

A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses

Alessandro Palumbo, Luca Cassano, Pedro Reviriego, Giuseppe Bianchi, Marco Ottavi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

9 Citations (Scopus)

Abstract

It has been demonstrated that Software exploitable Hardware Trojan Horses (HTHs) can be inserted in commercial CPUs and memories. Such attacks allow malicious users to run their own software or to gain unauthorized privileges over the system. As a consequence, HTHs must nowadays be considered a serious threat not only from academy but also from industry. In this paper we present a security checking module meant to be connected between the microprocessor and the instruction memory in order to monitor the fetching activity with the aim of detecting the activation of HTHs. In particular, we aim at detecting those HTHs that alter the expected execution flow by launching a malicious program. We integrated the proposed security checking module within a case study system based on a RISC-V microprocessor implemented on an FPGA and running a set of software benchmarks. This experiment demonstrated that our proposal is able to detect 100% of possible HTHs activations with no false alarms. We measured a LUT overhead of 0.5% and a FF overhead of 0.3%, with a 2.36% power consumption increase and no working frequency reduction.

Original language	English
Title of host publication	2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
Editors	Luigi Dilillo, Luca Cassano, Athanasios Papadimitriou
Place of Publication	Piscataway, NJ
Publisher	IEEE
Pages	1-6
Number of pages	6
ISBN (Electronic)	978-1-6654-1609-2
ISBN (Print)	978-1-6654-1610-8
DOIs	https://doi.org/10.1109/DFT52944.2021.9568291
Publication status	Published - 8 Oct 2021
Externally published	Yes
Event	34th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021 - Virtual, Athens, Greece Duration: 6 Oct 2021 → 8 Oct 2021 Conference number: 34

Publication series

Name	Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT
Volume	2021-October
ISSN (Print)	2576-1501
ISSN (Electronic)	2765-933X

Conference

Conference	34th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021
Abbreviated title	DFT 2021
Country/Territory	Greece
City	Virtual, Athens
Period	6/10/21 → 8/10/21

Keywords

Power measurement
Power demand
Microprocessors
Software
Hardware
Frequency measurement
Table lookup
n/a OA procedure

Access to Document

10.1109/DFT52944.2021.9568291

Cite this

Palumbo, A., Cassano, L., Reviriego, P., Bianchi, G., & Ottavi, M. (2021). A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses. In L. Dilillo, L. Cassano, & A. Papadimitriou (Eds.), 2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) (pp. 1-6). Article 9568291 (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT; Vol. 2021-October). IEEE. https://doi.org/10.1109/DFT52944.2021.9568291

Palumbo, Alessandro ; Cassano, Luca ; Reviriego, Pedro et al. / A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses. 2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). editor / Luigi Dilillo ; Luca Cassano ; Athanasios Papadimitriou. Piscataway, NJ : IEEE, 2021. pp. 1-6 (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT).

@inproceedings{58e390b57f8d40af900b2ac55dea953f,

title = "A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses",

abstract = "It has been demonstrated that Software exploitable Hardware Trojan Horses (HTHs) can be inserted in commercial CPUs and memories. Such attacks allow malicious users to run their own software or to gain unauthorized privileges over the system. As a consequence, HTHs must nowadays be considered a serious threat not only from academy but also from industry. In this paper we present a security checking module meant to be connected between the microprocessor and the instruction memory in order to monitor the fetching activity with the aim of detecting the activation of HTHs. In particular, we aim at detecting those HTHs that alter the expected execution flow by launching a malicious program. We integrated the proposed security checking module within a case study system based on a RISC-V microprocessor implemented on an FPGA and running a set of software benchmarks. This experiment demonstrated that our proposal is able to detect 100% of possible HTHs activations with no false alarms. We measured a LUT overhead of 0.5% and a FF overhead of 0.3%, with a 2.36% power consumption increase and no working frequency reduction.",

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Palumbo, A, Cassano, L, Reviriego, P, Bianchi, G & Ottavi, M 2021, A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses. in L Dilillo, L Cassano & A Papadimitriou (eds), 2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)., 9568291, Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT, vol. 2021-October, IEEE, Piscataway, NJ, pp. 1-6, 34th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Virtual, Athens, Greece, 6/10/21. https://doi.org/10.1109/DFT52944.2021.9568291

A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses. / Palumbo, Alessandro; Cassano, Luca; Reviriego, Pedro et al.
2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). ed. / Luigi Dilillo; Luca Cassano; Athanasios Papadimitriou. Piscataway, NJ: IEEE, 2021. p. 1-6 9568291 (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT; Vol. 2021-October).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - Reviriego, Pedro

AU - Bianchi, Giuseppe

AU - Ottavi, Marco

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N2 - It has been demonstrated that Software exploitable Hardware Trojan Horses (HTHs) can be inserted in commercial CPUs and memories. Such attacks allow malicious users to run their own software or to gain unauthorized privileges over the system. As a consequence, HTHs must nowadays be considered a serious threat not only from academy but also from industry. In this paper we present a security checking module meant to be connected between the microprocessor and the instruction memory in order to monitor the fetching activity with the aim of detecting the activation of HTHs. In particular, we aim at detecting those HTHs that alter the expected execution flow by launching a malicious program. We integrated the proposed security checking module within a case study system based on a RISC-V microprocessor implemented on an FPGA and running a set of software benchmarks. This experiment demonstrated that our proposal is able to detect 100% of possible HTHs activations with no false alarms. We measured a LUT overhead of 0.5% and a FF overhead of 0.3%, with a 2.36% power consumption increase and no working frequency reduction.

AB - It has been demonstrated that Software exploitable Hardware Trojan Horses (HTHs) can be inserted in commercial CPUs and memories. Such attacks allow malicious users to run their own software or to gain unauthorized privileges over the system. As a consequence, HTHs must nowadays be considered a serious threat not only from academy but also from industry. In this paper we present a security checking module meant to be connected between the microprocessor and the instruction memory in order to monitor the fetching activity with the aim of detecting the activation of HTHs. In particular, we aim at detecting those HTHs that alter the expected execution flow by launching a malicious program. We integrated the proposed security checking module within a case study system based on a RISC-V microprocessor implemented on an FPGA and running a set of software benchmarks. This experiment demonstrated that our proposal is able to detect 100% of possible HTHs activations with no false alarms. We measured a LUT overhead of 0.5% and a FF overhead of 0.3%, with a 2.36% power consumption increase and no working frequency reduction.

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KW - Hardware

KW - Frequency measurement

KW - Table lookup

KW - n/a OA procedure

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Palumbo A, Cassano L, Reviriego P, Bianchi G, Ottavi M. A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses. In Dilillo L, Cassano L, Papadimitriou A, editors, 2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). Piscataway, NJ: IEEE. 2021. p. 1-6. 9568291. (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT). doi: 10.1109/DFT52944.2021.9568291

A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses

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Keywords

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