A low-cost architecture for real-time processing and analysis of binary images

F.M. Hugen, B.J. Bulsink

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    Abstract

    An architecture is presented for low-cost and flexible realisation of image processing and analysis algorithms of binary images. The flexibility of the architecture is due to reconfigurable network of simple boolean functions. It is shown that this architecture can readily be implemented by low-cost off-the-shelf components. This is illustrated by some simulations of a hypothetical realisation.
    Original languageEnglish
    Title of host publicationProceedings 11th IAPR International Conference on Pattern Recognition
    Place of PublicationPiscataway, NJ
    PublisherIEEE
    Pages229-232
    Number of pages4
    VolumeIV
    ISBN (Print)0-8186-2925-8
    DOIs
    Publication statusPublished - 30 Aug 1992

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