A low noise, low residial offset chopped amplifier for mixed level applications

M.A.T. Sanduleanu, Adrianus Johannes Maria van Tuijl, R.F. Wassenaar, M.C. Lammers, Hans Wallinga

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    26 Citations (Scopus)

    Abstract

    This paper describes the principle and the design of a CMOS low noise, low residual offset, chopped amplifier with a class AB output stage for noise and offset reduction in mixed analog digital applications. The operation is based on chopping and dynamic element matching to reduce noise and offset, without excessive increase of the charge injection residual offset. The main goal is to achieve low residual offsets by chopping at high frequencies reducing at the same time the 1/f noise of the amplifier. Measurements on a 0.8 μm CMOS realization show reduction of 1/f noise and 18nV/√Hz residual thermal noise at low frequencies. The residual offset is lower than 100 μV up to 8 MHz chopping frequency. Driving a 32 Ω load the linearity is better than -80 dB and better than -88 dB for a 1 kΩ load at 1 kHz.
    Original languageEnglish
    Title of host publication5th IEEE International Conference on Electronics, Circuits and Systems, 1998 (Volume 2)
    Place of PublicationPiscataway, NJ, USA
    PublisherIEEE
    Pages233-236
    Number of pages4
    ISBN (Print)0-7803-5008-1
    DOIs
    Publication statusPublished - 7 Sep 1998
    Event5th IEEE International Conference on Electronics, Circuits and Systems, ICECS '98 - Lisbon, Portugal
    Duration: 7 Sep 199810 Sep 1998
    Conference number: 5

    Publication series

    Name
    PublisherIEEE

    Conference

    Conference5th IEEE International Conference on Electronics, Circuits and Systems, ICECS '98
    Abbreviated titleICECS 1998
    CountryPortugal
    CityLisbon
    Period7/09/9810/09/98

    Keywords

    • METIS-112982
    • IR-16097

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