A Low-Offset Double-Tail Latch-Type Voltage Sense Amplifier

Daniel Schinkel, E. Mensink, Eric A.M. Klumperink, Adrianus Johannes Maria van Tuijl, Bram Nauta

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    459 Downloads (Pure)

    Abstract

    Abstract— A latch-type voltage sense amplifier in 90nm CMOS is designed with a separated input and cross-coupled stage. This separation enables fast operation over a wide common-mode and supply voltage range. With a one-sigma offset of 8mV, the circuit consumes 92fJ/decision at 1.2V supply. It has an input equivalent noise of 1.5mV and requires only 18ps setup plus hold time.
    Original languageUndefined
    Title of host publicationAnnual Workshop on Circuits, Systems and Signal Processing (ProRISC)
    Place of PublicationUtrecht
    PublisherSTW
    Pages89-94
    Number of pages6
    ISBN (Print)978-90-73461-49-9
    Publication statusPublished - 29 Nov 2007
    Event18th Annual Workshop on Circuits, Systems and Signal Processing, ProRISC 2007 - Veldhoven, Netherlands
    Duration: 29 Nov 200730 Nov 2007
    Conference number: 18

    Publication series

    Name
    PublisherTechnology Foundation STW
    Number7

    Conference

    Conference18th Annual Workshop on Circuits, Systems and Signal Processing, ProRISC 2007
    CountryNetherlands
    CityVeldhoven
    Period29/11/0730/11/07

    Keywords

    • IR-62159
    • METIS-246007
    • EWI-11887

    Cite this