A Netlist Analysis Approach to Classify FPGA Configuration Bits in order to Optimize Scrubbing

Bernhard Schmidt, Daniel Ziener, Jürgen Teich

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Original language	English
Title of host publication	Proceedings of the 8th HiPEAC Workshop on Reconfigurable Computing (WRC)
Number of pages	1
Publication status	Published - 2014
Externally published	Yes
Event	8th HiPEAC Workshop on Reconfigurable Computing (WRC) 2014 - Vienna, Austria Duration: 21 Jan 2014 → 21 Jan 2014

Workshop	8th HiPEAC Workshop on Reconfigurable Computing (WRC) 2014
Abbreviated title	WRC 2014
Country/Territory	Austria
City	Vienna
Period	21/01/14 → 21/01/14

Cite this

@inproceedings{afdb76e6164545d4b01b2f791eb419ac,

title = "A Netlist Analysis Approach to Classify FPGA Configuration Bits in order to Optimize Scrubbing",

author = "Bernhard Schmidt and Daniel Ziener and J{\"u}rgen Teich",

year = "2014",

language = "English",

booktitle = "Proceedings of the 8th HiPEAC Workshop on Reconfigurable Computing (WRC)",

note = "8th HiPEAC Workshop on Reconfigurable Computing (WRC) 2014, WRC 2014 ; Conference date: 21-01-2014 Through 21-01-2014",

}

TY - GEN

T1 - A Netlist Analysis Approach to Classify FPGA Configuration Bits in order to Optimize Scrubbing

AU - Schmidt, Bernhard

AU - Ziener, Daniel

AU - Teich, Jürgen

PY - 2014

Y1 - 2014

M3 - Conference contribution

BT - Proceedings of the 8th HiPEAC Workshop on Reconfigurable Computing (WRC)

T2 - 8th HiPEAC Workshop on Reconfigurable Computing (WRC) 2014

Y2 - 21 January 2014 through 21 January 2014

ER -