Abstract
An MOS transistor is described in which the source and drain areas are obtained by diffusion from doped polycrystalline silicon. Polysilicon tracks form the interconnect with the diffusion areas without the need for contact windows. As a result transistor and junction sizes are reduced by a factor 2 or 3 over a normal structure. Polycrystalline silicon tracks in this [figure omitted] new technique are of greater advantage as interconnect layers than in the silicon gate technique.
Original language | English |
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Pages (from-to) | 523-525 |
Number of pages | 3 |
Journal | IEEE Transactions on Electron Devices |
Volume | 23 |
Issue number | 5 |
DOIs | |
Publication status | Published - 1976 |