A space/time tradeoff methodology using higher-order functions

Rinse Wester, Jan Kuper

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Abstract

Large digital signal processing applications like particle filtering require a tradeoff between execution time and area in order to scale on FPGAs. This research focuses on developing a methodology to make this tradeoff based on structure in the mathematical description of the application. Structure is expressed using higher-order functions which are transformed using tradeoff rules to reduce area usage on FPGA.
Original languageEnglish
Title of host publication23rd International Conference on Field Programmable Logic and Applications, FPL2013
Place of PublicationUSA
PublisherIEEE Computer Society
Pages1-2
Number of pages2
ISBN (Print)978-1-4799-0004-6
DOIs
Publication statusPublished - 2013
Event23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - HF Ipanema Park, Porto, Portugal
Duration: 2 Sep 2013 → 4 Sep 2013
Conference number: 23

Conference

Conference23rd International Conference on Field Programmable Logic and Applications, FPL 2013
Abbreviated titleFPL
CountryPortugal
CityPorto
Period2/09/13 → 4/09/13

Fingerprint

Field programmable gate arrays (FPGA)
Digital signal processing

Keywords

  • METIS-300111
  • EWI-23877
  • FPGAs
  • Design Methodology
  • IR-87842
  • particle filtering

Cite this

Wester, R., & Kuper, J. (2013). A space/time tradeoff methodology using higher-order functions. In 23rd International Conference on Field Programmable Logic and Applications, FPL2013 (pp. 1-2). USA: IEEE Computer Society. https://doi.org/10.1109/FPL.2013.6645613
Wester, Rinse ; Kuper, Jan. / A space/time tradeoff methodology using higher-order functions. 23rd International Conference on Field Programmable Logic and Applications, FPL2013. USA : IEEE Computer Society, 2013. pp. 1-2
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Wester, R & Kuper, J 2013, A space/time tradeoff methodology using higher-order functions. in 23rd International Conference on Field Programmable Logic and Applications, FPL2013. IEEE Computer Society, USA, pp. 1-2, 23rd International Conference on Field Programmable Logic and Applications, FPL 2013, Porto, Portugal, 2/09/13. https://doi.org/10.1109/FPL.2013.6645613

A space/time tradeoff methodology using higher-order functions. / Wester, Rinse; Kuper, Jan.

23rd International Conference on Field Programmable Logic and Applications, FPL2013. USA : IEEE Computer Society, 2013. p. 1-2.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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Wester R, Kuper J. A space/time tradeoff methodology using higher-order functions. In 23rd International Conference on Field Programmable Logic and Applications, FPL2013. USA: IEEE Computer Society. 2013. p. 1-2 https://doi.org/10.1109/FPL.2013.6645613

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