A sub-1-V Bandgap Voltage Reference in 32nm FinFET Technology

Anne J. Annema, P. Veldhorst, G Doornbos, Bram Nauta

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

23 Citations (Scopus)
42 Downloads (Pure)

Abstract

The bulk CMOS technology is expected to scale down to about 32nm node and likely the successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor with among other characteristics a much higher voltage gain compared to a conventional bulk MOS transistor [1]. Bandgap reference circuits cannot be directly ported from bulk CMOS technologies to SOI FinFET technologies, because both conventional diodes cannot be realized in thin SOI layers and also, area-efficient resistors are not readily available in processes with only metal(lic) gates. In this paper, a sub-1V bandgap reference circuit is implemented in a 32nm SOI FinFET technology, with an architecture that significantly reduces the required total resistance value.
Original languageEnglish
Title of host publicationIEEE International Solid-State Circuits Conference
Place of PublicationPiscataway
PublisherIEEE Computer Society Press
Pages332-333
Number of pages2
ISBN (Print)978-1-4244-3458-9
DOIs
Publication statusPublished - 8 Feb 2009
EventIEEE International Solid-State Circuits Conference, ISSCC 2009 - San Francisco, United States
Duration: 8 Feb 200912 Feb 2009

Conference

ConferenceIEEE International Solid-State Circuits Conference, ISSCC 2009
Abbreviated titleISSCC
CountryUnited States
CitySan Francisco
Period8/02/0912/02/09

Fingerprint

Energy gap
Electric potential
MOSFET devices
Networks (circuits)
Resistors
Diodes
FinFET
Metals

Keywords

  • reference circuits
  • EWI-15221
  • Silicon on Insulator
  • METIS-263776
  • IR-65428
  • MOSFET
  • nano electronics

Cite this

Annema, A. J., Veldhorst, P., Doornbos, G., & Nauta, B. (2009). A sub-1-V Bandgap Voltage Reference in 32nm FinFET Technology. In IEEE International Solid-State Circuits Conference (pp. 332-333). Piscataway: IEEE Computer Society Press. https://doi.org/10.1109/ISSCC.2009.4977443
Annema, Anne J. ; Veldhorst, P. ; Doornbos, G ; Nauta, Bram. / A sub-1-V Bandgap Voltage Reference in 32nm FinFET Technology. IEEE International Solid-State Circuits Conference. Piscataway : IEEE Computer Society Press, 2009. pp. 332-333
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abstract = "The bulk CMOS technology is expected to scale down to about 32nm node and likely the successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor with among other characteristics a much higher voltage gain compared to a conventional bulk MOS transistor [1]. Bandgap reference circuits cannot be directly ported from bulk CMOS technologies to SOI FinFET technologies, because both conventional diodes cannot be realized in thin SOI layers and also, area-efficient resistors are not readily available in processes with only metal(lic) gates. In this paper, a sub-1V bandgap reference circuit is implemented in a 32nm SOI FinFET technology, with an architecture that significantly reduces the required total resistance value.",
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Annema, AJ, Veldhorst, P, Doornbos, G & Nauta, B 2009, A sub-1-V Bandgap Voltage Reference in 32nm FinFET Technology. in IEEE International Solid-State Circuits Conference. IEEE Computer Society Press, Piscataway, pp. 332-333, IEEE International Solid-State Circuits Conference, ISSCC 2009, San Francisco, United States, 8/02/09. https://doi.org/10.1109/ISSCC.2009.4977443

A sub-1-V Bandgap Voltage Reference in 32nm FinFET Technology. / Annema, Anne J.; Veldhorst, P.; Doornbos, G; Nauta, Bram.

IEEE International Solid-State Circuits Conference. Piscataway : IEEE Computer Society Press, 2009. p. 332-333.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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AB - The bulk CMOS technology is expected to scale down to about 32nm node and likely the successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor with among other characteristics a much higher voltage gain compared to a conventional bulk MOS transistor [1]. Bandgap reference circuits cannot be directly ported from bulk CMOS technologies to SOI FinFET technologies, because both conventional diodes cannot be realized in thin SOI layers and also, area-efficient resistors are not readily available in processes with only metal(lic) gates. In this paper, a sub-1V bandgap reference circuit is implemented in a 32nm SOI FinFET technology, with an architecture that significantly reduces the required total resistance value.

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Annema AJ, Veldhorst P, Doornbos G, Nauta B. A sub-1-V Bandgap Voltage Reference in 32nm FinFET Technology. In IEEE International Solid-State Circuits Conference. Piscataway: IEEE Computer Society Press. 2009. p. 332-333 https://doi.org/10.1109/ISSCC.2009.4977443