Abstract
The bulk CMOS technology is expected to scale down to about 32nm node and likely the successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor with among other characteristics a much higher voltage gain compared to a conventional bulk MOS transistor [1]. Bandgap reference circuits cannot be directly ported from bulk CMOS technologies to SOI FinFET technologies, because both conventional diodes cannot be realized in thin SOI layers and also, area-efficient resistors are not readily available in processes with only metal(lic) gates. In this paper, a sub-1V bandgap reference circuit is implemented in a 32nm SOI FinFET technology, with an architecture that significantly reduces the required total resistance value.
Original language | English |
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Title of host publication | IEEE International Solid-State Circuits Conference |
Place of Publication | Piscataway |
Publisher | IEEE |
Pages | 332-333 |
Number of pages | 2 |
ISBN (Print) | 978-1-4244-3458-9 |
DOIs | |
Publication status | Published - 8 Feb 2009 |
Event | IEEE International Solid-State Circuits Conference, ISSCC 2009 - San Francisco, United States Duration: 8 Feb 2009 → 12 Feb 2009 |
Conference
Conference | IEEE International Solid-State Circuits Conference, ISSCC 2009 |
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Abbreviated title | ISSCC |
Country/Territory | United States |
City | San Francisco |
Period | 8/02/09 → 12/02/09 |
Keywords
- reference circuits
- EWI-15221
- Silicon on Insulator
- METIS-263776
- IR-65428
- MOSFET
- nano electronics