Abstract
| Original language | English |
|---|---|
| Title of host publication | IEEE International Solid-State Circuits Conference |
| Place of Publication | Piscataway |
| Publisher | IEEE Computer Society Press |
| Pages | 332-333 |
| Number of pages | 2 |
| ISBN (Print) | 978-1-4244-3458-9 |
| DOIs | |
| Publication status | Published - 8 Feb 2009 |
| Event | IEEE International Solid-State Circuits Conference, ISSCC 2009 - San Francisco, United States Duration: 8 Feb 2009 → 12 Feb 2009 |
Conference
| Conference | IEEE International Solid-State Circuits Conference, ISSCC 2009 |
|---|---|
| Abbreviated title | ISSCC |
| Country | United States |
| City | San Francisco |
| Period | 8/02/09 → 12/02/09 |
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Keywords
- reference circuits
- EWI-15221
- Silicon on Insulator
- METIS-263776
- IR-65428
- MOSFET
- nano electronics
Cite this
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A sub-1-V Bandgap Voltage Reference in 32nm FinFET Technology. / Annema, Anne J.; Veldhorst, P.; Doornbos, G; Nauta, Bram.
IEEE International Solid-State Circuits Conference. Piscataway : IEEE Computer Society Press, 2009. p. 332-333.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
TY - GEN
T1 - A sub-1-V Bandgap Voltage Reference in 32nm FinFET Technology
AU - Annema, Anne J.
AU - Veldhorst, P.
AU - Doornbos, G
AU - Nauta, Bram
PY - 2009/2/8
Y1 - 2009/2/8
N2 - The bulk CMOS technology is expected to scale down to about 32nm node and likely the successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor with among other characteristics a much higher voltage gain compared to a conventional bulk MOS transistor [1]. Bandgap reference circuits cannot be directly ported from bulk CMOS technologies to SOI FinFET technologies, because both conventional diodes cannot be realized in thin SOI layers and also, area-efficient resistors are not readily available in processes with only metal(lic) gates. In this paper, a sub-1V bandgap reference circuit is implemented in a 32nm SOI FinFET technology, with an architecture that significantly reduces the required total resistance value.
AB - The bulk CMOS technology is expected to scale down to about 32nm node and likely the successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor with among other characteristics a much higher voltage gain compared to a conventional bulk MOS transistor [1]. Bandgap reference circuits cannot be directly ported from bulk CMOS technologies to SOI FinFET technologies, because both conventional diodes cannot be realized in thin SOI layers and also, area-efficient resistors are not readily available in processes with only metal(lic) gates. In this paper, a sub-1V bandgap reference circuit is implemented in a 32nm SOI FinFET technology, with an architecture that significantly reduces the required total resistance value.
KW - reference circuits
KW - EWI-15221
KW - Silicon on Insulator
KW - METIS-263776
KW - IR-65428
KW - MOSFET
KW - nano electronics
U2 - 10.1109/ISSCC.2009.4977443
DO - 10.1109/ISSCC.2009.4977443
M3 - Conference contribution
SN - 978-1-4244-3458-9
SP - 332
EP - 333
BT - IEEE International Solid-State Circuits Conference
PB - IEEE Computer Society Press
CY - Piscataway
ER -