A sub-mW all-passive RF front end with implicit capacitive stacking achieving 13 dB gain, 5 dB NF and +25 dBm OOB-IIP3

Vijaya Kumar Purushothaman; Eric A.M. Klumperink; Berta Trullas Clavere; Bram  Nauta

doi:10.1109/RFIC.2019.8701860

A sub-mW all-passive RF front end with implicit capacitive stacking achieving 13 dB gain, 5 dB NF and +25 dBm OOB-IIP3

Vijaya Kumar Purushothaman, Eric A.M. Klumperink, Berta Trullas Clavere, Bram Nauta

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

7 Citations (Scopus)

317 Downloads (Pure)

Abstract

This paper presents a sub-mW mixer-first RF front-end that exploits a novel capacitive stacking technique in an altered bottom-plate N-path filter/mixer to achieve passive voltage gain and high-linearity at low noise figure. Capacitive stacking is realized implicitly by reading out the voltage from the bottom-plate of N-path capacitors instead of their top-plate, which provides a 2x gain at the read-out capacitors. Additional passive voltage gain is achieved using impedance upconversion while improving the out-of-band linearity performance of small switches. With no other active circuitry, only clock generation circuits determine the total power consumption of this RF front-end. A prototype is fabricated in GF22 nm FDSOI technology. Operating at f _LO= 1 GHz, the prototype achieves a voltage gain of 13 dB, 5 dB Noise Figure and +25/+66 dBm Out-of-band IIP3/IIP2 at 160 MHz offset while consuming only 600 μW of power from a 0.8 V supply.

Original language	English
Title of host publication	IEEE Radio Frequency Integrated Circuits Symposium 2019
Place of Publication	Boston, Massachusetts, US
Publisher	IEEE
Pages	91-94
Number of pages	4
ISBN (Electronic)	978-1-7281-1701-0
DOIs	https://doi.org/10.1109/RFIC.2019.8701860
Publication status	Published - 3 Jun 2019
Event	IEEE Radio Frequency Integrated Circuits Symposium 2019 - Boston Convention and Exhibition Center, Boston, United States Duration: 2 Jun 2019 → 4 Jun 2019

Conference

Conference	IEEE Radio Frequency Integrated Circuits Symposium 2019
Abbreviated title	RFIC 2019
Country/Territory	United States
City	Boston
Period	2/06/19 → 4/06/19

Keywords

passive mixer
N-path filter
mixer-first receiver
bottom plate mixing
capacitive stacking
high linearity
Low Power
RF front-ends

Access to Document

10.1109/RFIC.2019.8701860

RFIC2019_SubmW_mixer_first_RFFE_VKPurushothaman_V11Accepted author version, 729 KB

7 Citations
1 Article

Low-Power High-Linearity Mixer-First receiver using implicit capacitive Stacking with 3× voltage gain
Purushothaman, V. K., Klumperink, E. A. M., Plompen, R. & Nauta, B., 1 Jan 2022, In: IEEE journal of solid-state circuits. 57, 1, p. 245-259 15 p.
Research output: Contribution to journal › Article › Academic › peer-review

Open Access
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39 Citations (Scopus)

670 Downloads (Pure)

Cite this

@inproceedings{7c22e6f7dc3a4fd5a27c16511142a03c,

title = "A sub-mW all-passive RF front end with implicit capacitive stacking achieving 13 dB gain, 5 dB NF and +25 dBm OOB-IIP3",

abstract = "This paper presents a sub-mW mixer-first RF front-end that exploits a novel capacitive stacking technique in an altered bottom-plate N-path filter/mixer to achieve passive voltage gain and high-linearity at low noise figure. Capacitive stacking is realized implicitly by reading out the voltage from the bottom-plate of N-path capacitors instead of their top-plate, which provides a 2x gain at the read-out capacitors. Additional passive voltage gain is achieved using impedance upconversion while improving the out-of-band linearity performance of small switches. With no other active circuitry, only clock generation circuits determine the total power consumption of this RF front-end. A prototype is fabricated in GF22 nm FDSOI technology. Operating at f LO= 1 GHz, the prototype achieves a voltage gain of 13 dB, 5 dB Noise Figure and +25/+66 dBm Out-of-band IIP3/IIP2 at 160 MHz offset while consuming only 600 μW of power from a 0.8 V supply. ",

keywords = "passive mixer, N-path filter, mixer-first receiver, bottom plate mixing, capacitive stacking, high linearity, Low Power, RF front-ends",

author = "Purushothaman, {Vijaya Kumar} and Klumperink, {Eric A.M.} and {Trullas Clavere}, Berta and Bram Nauta",

year = "2019",

month = jun,

day = "3",

doi = "10.1109/RFIC.2019.8701860",

language = "English",

pages = "91--94",

booktitle = "IEEE Radio Frequency Integrated Circuits Symposium 2019",

publisher = "IEEE",

address = "United States",

note = "IEEE Radio Frequency Integrated Circuits Symposium 2019, RFIC 2019 ; Conference date: 02-06-2019 Through 04-06-2019",

}

Purushothaman, VK, Klumperink, EAM, Trullas Clavere, B & Nauta, B 2019, A sub-mW all-passive RF front end with implicit capacitive stacking achieving 13 dB gain, 5 dB NF and +25 dBm OOB-IIP3. in IEEE Radio Frequency Integrated Circuits Symposium 2019., 8701860, IEEE, Boston, Massachusetts, US, pp. 91-94, IEEE Radio Frequency Integrated Circuits Symposium 2019, Boston, Massachusetts, United States, 2/06/19. https://doi.org/10.1109/RFIC.2019.8701860

A sub-mW all-passive RF front end with implicit capacitive stacking achieving 13 dB gain, 5 dB NF and +25 dBm OOB-IIP3. / Purushothaman, Vijaya Kumar; Klumperink, Eric A.M.; Trullas Clavere, Berta et al.
IEEE Radio Frequency Integrated Circuits Symposium 2019. Boston, Massachusetts, US: IEEE, 2019. p. 91-94 8701860.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - Trullas Clavere, Berta

AU - Nauta, Bram

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N2 - This paper presents a sub-mW mixer-first RF front-end that exploits a novel capacitive stacking technique in an altered bottom-plate N-path filter/mixer to achieve passive voltage gain and high-linearity at low noise figure. Capacitive stacking is realized implicitly by reading out the voltage from the bottom-plate of N-path capacitors instead of their top-plate, which provides a 2x gain at the read-out capacitors. Additional passive voltage gain is achieved using impedance upconversion while improving the out-of-band linearity performance of small switches. With no other active circuitry, only clock generation circuits determine the total power consumption of this RF front-end. A prototype is fabricated in GF22 nm FDSOI technology. Operating at f LO= 1 GHz, the prototype achieves a voltage gain of 13 dB, 5 dB Noise Figure and +25/+66 dBm Out-of-band IIP3/IIP2 at 160 MHz offset while consuming only 600 μW of power from a 0.8 V supply.

AB - This paper presents a sub-mW mixer-first RF front-end that exploits a novel capacitive stacking technique in an altered bottom-plate N-path filter/mixer to achieve passive voltage gain and high-linearity at low noise figure. Capacitive stacking is realized implicitly by reading out the voltage from the bottom-plate of N-path capacitors instead of their top-plate, which provides a 2x gain at the read-out capacitors. Additional passive voltage gain is achieved using impedance upconversion while improving the out-of-band linearity performance of small switches. With no other active circuitry, only clock generation circuits determine the total power consumption of this RF front-end. A prototype is fabricated in GF22 nm FDSOI technology. Operating at f LO= 1 GHz, the prototype achieves a voltage gain of 13 dB, 5 dB Noise Figure and +25/+66 dBm Out-of-band IIP3/IIP2 at 160 MHz offset while consuming only 600 μW of power from a 0.8 V supply.

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KW - N-path filter

KW - mixer-first receiver

KW - bottom plate mixing

KW - capacitive stacking

KW - high linearity

KW - Low Power

KW - RF front-ends

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M3 - Conference contribution

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BT - IEEE Radio Frequency Integrated Circuits Symposium 2019

PB - IEEE

CY - Boston, Massachusetts, US

T2 - IEEE Radio Frequency Integrated Circuits Symposium 2019

Y2 - 2 June 2019 through 4 June 2019

ER -

A sub-mW all-passive RF front end with implicit capacitive stacking achieving 13 dB gain, 5 dB NF and +25 dBm OOB-IIP3

Abstract

Conference

Keywords

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Research output

Low-Power High-Linearity Mixer-First receiver using implicit capacitive Stacking with 3× voltage gain

Cite this