A Switch Architecture For Real-time Multimedia Communications

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    38 Downloads (Pure)

    Abstract

    In this paper we present a switch that can be used to transfer multimedia type of trafJic. The switch provides a guaranteed throughput and a bounded latency. We focus on the design of a prototype Switching Element using the new technology opportunities being offered today. The architecture meets the multimedia requirements but still has a low complexity and needs a minimum amount of hardware. A main item of this paper will be the background of the architectural design decisions made. These include the interconnection topology, buffer organization, routing and scheduling. The implementation of the switching fabric with FPGAs, allows us to experiment with switching mode, routing strategy and scheduling policy in a multimedia environment. The witching elements are interconnected in a Kautz topology. Kautz graphs have interesting properties such as: a small diametec the degree is independent of the network size, the network is fault-tolerant and has a simple routing algorithm.
    Original languageUndefined
    Title of host publication2nd Euromicro Workshop on Parallel and Distributed Processing
    Place of PublicationLos Alamitos, California
    PublisherIEEE
    Pages438-444
    Number of pages7
    ISBN (Print)0-8186-5370-1
    Publication statusPublished - 1994
    Event2nd Euromicro Workshop on Parallel and Distributed Processing - Malaga, Spain
    Duration: 1 Jan 19941 Jan 1994

    Publication series

    Name
    PublisherIEEE

    Workshop

    Workshop2nd Euromicro Workshop on Parallel and Distributed Processing
    Period1/01/941/01/94

    Keywords

    • CAES-EEA: Efficient Embedded Architectures
    • IR-18862
    • EWI-1182
    • CAES-PS: Pervasive Systems
    • METIS-119384

    Cite this