TY - JOUR
T1 - A synergetic use of bloom filters for error detection and correction
AU - Reviriego, P.
AU - Pontarelli, S.
AU - Maestro, J.A.
AU - Ottavi, M.
PY - 2015
Y1 - 2015
N2 - Bloom filters (BFs) provide a fast and efficient way to check whether a given element belongs to a set. The BFs are used in numerous applications, for example, in communications and networking. There is also ongoing research to extend and enhance BFs and to use them in new scenarios. Reliability is becoming a challenge for advanced electronic circuits as the number of errors due to manufacturing variations, radiation, and reduced noise margins increase as technology scales. In this brief, it is shown that BFs can be used to detect and correct errors in their associated data set. This allows a synergetic reuse of existing BFs to also detect and correct errors. This is illustrated through an example of a counting BF used for IP traffic classification. The results show that the proposed scheme can effectively correct single errors in the associated set. The proposed scheme can be of interest in practical designs to effectively mitigate errors with a reduced overhead in terms of circuit area and power.
AB - Bloom filters (BFs) provide a fast and efficient way to check whether a given element belongs to a set. The BFs are used in numerous applications, for example, in communications and networking. There is also ongoing research to extend and enhance BFs and to use them in new scenarios. Reliability is becoming a challenge for advanced electronic circuits as the number of errors due to manufacturing variations, radiation, and reduced noise margins increase as technology scales. In this brief, it is shown that BFs can be used to detect and correct errors in their associated data set. This allows a synergetic reuse of existing BFs to also detect and correct errors. This is illustrated through an example of a counting BF used for IP traffic classification. The results show that the proposed scheme can effectively correct single errors in the associated set. The proposed scheme can be of interest in practical designs to effectively mitigate errors with a reduced overhead in terms of circuit area and power.
UR - http://www.scopus.com/inward/record.url?eid=2-s2.0-85027927981&partnerID=MN8TOARS
U2 - 10.1109/TVLSI.2014.2311234
DO - 10.1109/TVLSI.2014.2311234
M3 - Article
SN - 1063-8210
VL - 23
SP - 584
EP - 587
JO - IEEE transactions on very large scale integration (VLSI) systems
JF - IEEE transactions on very large scale integration (VLSI) systems
IS - 3
ER -