Abstract
The future trend of software defined radio (SDR) platforms moves toward reconfigurable Multiprocessor System-on−Chips (MPSoCs). However, there is a gap between the modelling of the dynamic radio applications and the optimized implementation of the application on reconfigurable multiprocessor architectures. We aim to close this gap by applying a system level design method for the modelling and implementation of the dynamic applications on an MPSoC. The state−of−the−art radio technology based on SDR, Cognitive Radio, is considered as a design case to demonstrate the effectiveness of this method.
| Original language | Undefined |
|---|---|
| Title of host publication | IEEE International Symposium on System-on-Chip 2007 |
| Place of Publication | Tampere, Finland |
| Publisher | IEEE Circuits and Systems Society |
| Pages | 3-6 |
| Number of pages | 4 |
| ISBN (Print) | 1-4244-1368-0 |
| DOIs | |
| Publication status | Published - 20 Nov 2007 |
Publication series
| Name | |
|---|---|
| Publisher | IEEE Circuits and Systems Society |
| Number | FS-07-05 |
Keywords
- EWI-11410
- METIS-245780
- IR-64465
Cite this
Zhang, Q., Kokkeler, A. B. J., & Smit, G. J. M. (2007). A system-level design method for cognitive radio on a reconfigurable multi-processor architecture. In IEEE International Symposium on System-on-Chip 2007 (pp. 3-6). [10.1109/ISSOC.2007.4427419] Tampere, Finland: IEEE Circuits and Systems Society. https://doi.org/10.1109/ISSOC.2007.4427419