A Transceiver for High-Speed Global On-Chip Data Communication

Daniel Schinkel; Eisse Mensink; Eric Klumperink; Ed van Tuijl; Bram Nauta

A Transceiver for High-Speed Global On-Chip Data Communication

Daniel Schinkel, Eisse Mensink, Eric Klumperink, Ed van Tuijl, Bram Nauta

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic

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Abstract

Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. In this paper we show how a special form of equalization, pulse-width pre-emphasis, can significantly increase the data rate for a given length of uninterrupted interconnect, especially if used in combination with lowohmic termination and twisted differential interconnects. To validate these techniques, a bus-transceiver test chip in a 0.13μm, 1.2V, 6M copper CMOS process has been designed. The chip uses 10mm long differential interconnects with wire widths and spacing of only 0.4μm. With transceivers operating in conventional mode, the chip achieves only 0.55Gb/s/ch. The achievable data rate increases to 3Gb/s/ch (consuming 2pJ/bit) if pulse-width pre-emphasis and low-ohmic termination are turned on.

Original language	English
Title of host publication	16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005
Place of Publication	Utrecht
Publisher	STW
Pages	279-283
Number of pages	5
ISBN (Print)	90-73461-50-2
Publication status	Published - Nov 2005
Event	16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005 - Veldhoven, Netherlands Duration: 17 Nov 2005 → 18 Nov 2005 Conference number: 16

Workshop

Workshop	16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005
Country/Territory	Netherlands
City	Veldhoven
Period	17/11/05 → 18/11/05

Keywords

Transceivers
Data bus
Interconnect
Pulse-width
On-chip dommunication
Intersymbol interference (ISI)
Pre-emphasis

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Schinkel05transceiverFinal published version, 1.96 MB

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A Transceiver for High-Speed Global On-Chip Data Communication
Schinkel, D., Mensink, E., Klumperink, E., van Tuijl, E. & Nauta, B., 29 Sept 2005.
Research output: Contribution to conference › Poster › Other research output

Cite this

@inproceedings{9c97e92f1ce74e2abad21be26f5d8375,

title = "A Transceiver for High-Speed Global On-Chip Data Communication",

abstract = "Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. In this paper we show how a special form of equalization, pulse-width pre-emphasis, can significantly increase the data rate for a given length of uninterrupted interconnect, especially if used in combination with lowohmic termination and twisted differential interconnects. To validate these techniques, a bus-transceiver test chip in a 0.13μm, 1.2V, 6M copper CMOS process has been designed. The chip uses 10mm long differential interconnects with wire widths and spacing of only 0.4μm. With transceivers operating in conventional mode, the chip achieves only 0.55Gb/s/ch. The achievable data rate increases to 3Gb/s/ch (consuming 2pJ/bit) if pulse-width pre-emphasis and low-ohmic termination are turned on.",

keywords = "Transceivers, Data bus, Interconnect, Pulse-width, On-chip dommunication, Intersymbol interference (ISI), Pre-emphasis",

author = "Daniel Schinkel and Eisse Mensink and Eric Klumperink and {van Tuijl}, Ed and Bram Nauta",

year = "2005",

month = nov,

language = "English",

isbn = "90-73461-50-2",

pages = "279--283",

booktitle = "16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005",

publisher = "STW",

note = "16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005 ; Conference date: 17-11-2005 Through 18-11-2005",

}

TY - GEN

T1 - A Transceiver for High-Speed Global On-Chip Data Communication

AU - Schinkel, Daniel

AU - Mensink, Eisse

AU - Klumperink, Eric

AU - van Tuijl, Ed

AU - Nauta, Bram

N1 - Conference code: 16

PY - 2005/11

Y1 - 2005/11

N2 - Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. In this paper we show how a special form of equalization, pulse-width pre-emphasis, can significantly increase the data rate for a given length of uninterrupted interconnect, especially if used in combination with lowohmic termination and twisted differential interconnects. To validate these techniques, a bus-transceiver test chip in a 0.13μm, 1.2V, 6M copper CMOS process has been designed. The chip uses 10mm long differential interconnects with wire widths and spacing of only 0.4μm. With transceivers operating in conventional mode, the chip achieves only 0.55Gb/s/ch. The achievable data rate increases to 3Gb/s/ch (consuming 2pJ/bit) if pulse-width pre-emphasis and low-ohmic termination are turned on.

AB - Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. In this paper we show how a special form of equalization, pulse-width pre-emphasis, can significantly increase the data rate for a given length of uninterrupted interconnect, especially if used in combination with lowohmic termination and twisted differential interconnects. To validate these techniques, a bus-transceiver test chip in a 0.13μm, 1.2V, 6M copper CMOS process has been designed. The chip uses 10mm long differential interconnects with wire widths and spacing of only 0.4μm. With transceivers operating in conventional mode, the chip achieves only 0.55Gb/s/ch. The achievable data rate increases to 3Gb/s/ch (consuming 2pJ/bit) if pulse-width pre-emphasis and low-ohmic termination are turned on.

KW - Transceivers

KW - Data bus

KW - Interconnect

KW - Pulse-width

KW - On-chip dommunication

KW - Intersymbol interference (ISI)

KW - Pre-emphasis

M3 - Conference contribution

SN - 90-73461-50-2

SP - 279

EP - 283

BT - 16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005

PB - STW

CY - Utrecht

T2 - 16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005

Y2 - 17 November 2005 through 18 November 2005

ER -

A Transceiver for High-Speed Global On-Chip Data Communication

Abstract

Workshop

Keywords

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Research output

A Transceiver for High-Speed Global On-Chip Data Communication

Cite this