A Transceiver for High-Speed Global On-Chip Data Communication

Daniel Schinkel, E. Mensink, Eric A.M. Klumperink, Adrianus Johannes Maria van Tuijl, Bram Nauta

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademic

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Abstract

Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. In this paper we show how a special form of equalization, pulse-width pre-emphasis, can significantly increase the data rate for a given length of uninterrupted interconnect, especially if used in combination with lowohmic termination and twisted differential interconnects. To validate these techniques, a bus-transceiver test chip in a 0.13μm, 1.2V, 6M copper CMOS process has been designed. The chip uses 10mm long differential interconnects with wire widths and spacing of only 0.4μm. With transceivers operating in conventional mode, the chip achieves only 0.55Gb/s/ch. The achievable data rate increases to 3Gb/s/ch (consuming 2pJ/bit) if pulse-width pre-emphasis and low-ohmic termination are turned on.
Original languageUndefined
Title of host publication16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005
Place of PublicationUtrecht
PublisherSTW
Pages279-283
Number of pages5
ISBN (Print)90-73461-50-2
Publication statusPublished - Nov 2005
Event16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005 - Veldhoven, Netherlands
Duration: 17 Nov 200518 Nov 2005
Conference number: 16

Publication series

Name
PublisherTechnology Foundation STW

Workshop

Workshop16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005
CountryNetherlands
CityVeldhoven
Period17/11/0518/11/05

Keywords

  • transceivers
  • EWI-14514
  • METIS-225556
  • IR-53168
  • Data Bus
  • Interconnect
  • Pulse-width
  • On-Chip Communication
  • intersymbol interference (ISI)
  • pre-emphasis

Cite this

Schinkel, D., Mensink, E., Klumperink, E. A. M., van Tuijl, A. J. M., & Nauta, B. (2005). A Transceiver for High-Speed Global On-Chip Data Communication. In 16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005 (pp. 279-283). Utrecht: STW.
Schinkel, Daniel ; Mensink, E. ; Klumperink, Eric A.M. ; van Tuijl, Adrianus Johannes Maria ; Nauta, Bram. / A Transceiver for High-Speed Global On-Chip Data Communication. 16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005. Utrecht : STW, 2005. pp. 279-283
@inproceedings{9c97e92f1ce74e2abad21be26f5d8375,
title = "A Transceiver for High-Speed Global On-Chip Data Communication",
abstract = "Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. In this paper we show how a special form of equalization, pulse-width pre-emphasis, can significantly increase the data rate for a given length of uninterrupted interconnect, especially if used in combination with lowohmic termination and twisted differential interconnects. To validate these techniques, a bus-transceiver test chip in a 0.13μm, 1.2V, 6M copper CMOS process has been designed. The chip uses 10mm long differential interconnects with wire widths and spacing of only 0.4μm. With transceivers operating in conventional mode, the chip achieves only 0.55Gb/s/ch. The achievable data rate increases to 3Gb/s/ch (consuming 2pJ/bit) if pulse-width pre-emphasis and low-ohmic termination are turned on.",
keywords = "transceivers, EWI-14514, METIS-225556, IR-53168, Data Bus, Interconnect, Pulse-width, On-Chip Communication, intersymbol interference (ISI), pre-emphasis",
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year = "2005",
month = "11",
language = "Undefined",
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publisher = "STW",
pages = "279--283",
booktitle = "16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005",

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Schinkel, D, Mensink, E, Klumperink, EAM, van Tuijl, AJM & Nauta, B 2005, A Transceiver for High-Speed Global On-Chip Data Communication. in 16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005. STW, Utrecht, pp. 279-283, 16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005, Veldhoven, Netherlands, 17/11/05.

A Transceiver for High-Speed Global On-Chip Data Communication. / Schinkel, Daniel; Mensink, E.; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram.

16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005. Utrecht : STW, 2005. p. 279-283.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademic

TY - GEN

T1 - A Transceiver for High-Speed Global On-Chip Data Communication

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AU - Mensink, E.

AU - Klumperink, Eric A.M.

AU - van Tuijl, Adrianus Johannes Maria

AU - Nauta, Bram

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N2 - Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. In this paper we show how a special form of equalization, pulse-width pre-emphasis, can significantly increase the data rate for a given length of uninterrupted interconnect, especially if used in combination with lowohmic termination and twisted differential interconnects. To validate these techniques, a bus-transceiver test chip in a 0.13μm, 1.2V, 6M copper CMOS process has been designed. The chip uses 10mm long differential interconnects with wire widths and spacing of only 0.4μm. With transceivers operating in conventional mode, the chip achieves only 0.55Gb/s/ch. The achievable data rate increases to 3Gb/s/ch (consuming 2pJ/bit) if pulse-width pre-emphasis and low-ohmic termination are turned on.

AB - Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. In this paper we show how a special form of equalization, pulse-width pre-emphasis, can significantly increase the data rate for a given length of uninterrupted interconnect, especially if used in combination with lowohmic termination and twisted differential interconnects. To validate these techniques, a bus-transceiver test chip in a 0.13μm, 1.2V, 6M copper CMOS process has been designed. The chip uses 10mm long differential interconnects with wire widths and spacing of only 0.4μm. With transceivers operating in conventional mode, the chip achieves only 0.55Gb/s/ch. The achievable data rate increases to 3Gb/s/ch (consuming 2pJ/bit) if pulse-width pre-emphasis and low-ohmic termination are turned on.

KW - transceivers

KW - EWI-14514

KW - METIS-225556

KW - IR-53168

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KW - Interconnect

KW - Pulse-width

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KW - intersymbol interference (ISI)

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M3 - Conference contribution

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Schinkel D, Mensink E, Klumperink EAM, van Tuijl AJM, Nauta B. A Transceiver for High-Speed Global On-Chip Data Communication. In 16th Workshop on Circuits, Systems and Signal Processing, ProRISC 2005. Utrecht: STW. 2005. p. 279-283