A Transformational Approach to VHDL and CDFG Based High-Level Synthesis: a Case Study

Peter F.A. Middelhoek; P.F.A. Middelhoek; G.E. Mekenkamp; Egbert Molenkamp; Th. Krol

doi:10.1109/CICC.1995.518133

A Transformational Approach to VHDL and CDFG Based High-Level Synthesis: a Case Study

Peter F.A. Middelhoek, P.F.A. Middelhoek, G.E. Mekenkamp, Egbert Molenkamp, Th. Krol

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

2 Citations (Scopus)

70 Downloads (Pure)

Abstract

In this paper, a novel multi-target design methodology based on the concepts of transformational design, and its application to the interlaced-to-progressive scan conversion (IPSC) problem, are discussed. Starting from a single high-level behavioral specification in VHDL a direction detector used in IPSC algorithms is mapped onto both a custom implementation and a programmable video signal processor. Results are compared with those previously obtained using different tools and methodologies

Original language	Undefined
Title of host publication	Proc of-the CICC 95
Place of Publication	Santa Clara CA, USA
Publisher	IEEE
Pages	37-40
Number of pages	4
ISBN (Print)	9780780325845
DOIs	https://doi.org/10.1109/CICC.1995.518133
Publication status	Published - 1 Jun 1995
Event	IEEE Custom Integrated Circuits Conference, CICC - Santa Clara CA, USA Duration: 1 May 1995 → 1 May 1995

Publication series

Name
Publisher	IEEE

Conference

Conference	IEEE Custom Integrated Circuits Conference, CICC
Period	1/05/95 → 1/05/95
Other	May 1995

Keywords

METIS-119365
IR-18843

Access to Document

10.1109/CICC.1995.518133

00518133
open

Cite this

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title = "A Transformational Approach to VHDL and CDFG Based High-Level Synthesis: a Case Study",

abstract = "In this paper, a novel multi-target design methodology based on the concepts of transformational design, and its application to the interlaced-to-progressive scan conversion (IPSC) problem, are discussed. Starting from a single high-level behavioral specification in VHDL a direction detector used in IPSC algorithms is mapped onto both a custom implementation and a programmable video signal processor. Results are compared with those previously obtained using different tools and methodologies",

keywords = "METIS-119365, IR-18843",

author = "Middelhoek, {Peter F.A.} and P.F.A. Middelhoek and G.E. Mekenkamp and Egbert Molenkamp and Th. Krol",

year = "1995",

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AU - Middelhoek, Peter F.A.

AU - Middelhoek, P.F.A.

AU - Mekenkamp, G.E.

AU - Molenkamp, Egbert

AU - Krol, Th.

PY - 1995/6/1

Y1 - 1995/6/1

N2 - In this paper, a novel multi-target design methodology based on the concepts of transformational design, and its application to the interlaced-to-progressive scan conversion (IPSC) problem, are discussed. Starting from a single high-level behavioral specification in VHDL a direction detector used in IPSC algorithms is mapped onto both a custom implementation and a programmable video signal processor. Results are compared with those previously obtained using different tools and methodologies

AB - In this paper, a novel multi-target design methodology based on the concepts of transformational design, and its application to the interlaced-to-progressive scan conversion (IPSC) problem, are discussed. Starting from a single high-level behavioral specification in VHDL a direction detector used in IPSC algorithms is mapped onto both a custom implementation and a programmable video signal processor. Results are compared with those previously obtained using different tools and methodologies

KW - METIS-119365

KW - IR-18843

U2 - 10.1109/CICC.1995.518133

DO - 10.1109/CICC.1995.518133

M3 - Conference contribution

SN - 9780780325845

SP - 37

EP - 40

BT - Proc of-the CICC 95

PB - IEEE

CY - Santa Clara CA, USA

Y2 - 1 May 1995 through 1 May 1995

ER -