A Tunable 300-800MHz RF-Sampling Receiver Achieving 60dB Harmonic Rejection and 0.8dB Minimum NF in 65nm CMOS

Z. Ru; Eric A.M. Klumperink; C. Saavedra; Bram Nauta

doi:10.1109/RFIC.2009.5135481

A Tunable 300-800MHz RF-Sampling Receiver Achieving 60dB Harmonic Rejection and 0.8dB Minimum NF in 65nm CMOS

Z. Ru, Eric A.M. Klumperink, C. Saavedra, Bram Nauta

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

4 Citations (Scopus)

163 Downloads (Pure)

Abstract

A 300-800MHz CMOS radio receiver aiming at software-defined radio is proposed. It exploits an LNA preceded by a tunable LC filter with one external coil to achieve voltage amplification for low NF and low-pass filtering to improve the 3rd and 5th harmonic rejection of an RF-sampling receiver to >60dB. The balun-LNA provides partial IM3 compensation, to drive a wideband sampling downconverter. The measured gain is 22-28dB while NF ranges from 0.8-4.3dB. The core consumes 6mW and clock takes 12mW.

Original language	English
Title of host publication	Proceedings of the Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009.
Place of Publication	Piscataway
Publisher	IEEE
Pages	21-24
Number of pages	4
ISBN (Print)	978-1-4244-3376-6
DOIs	https://doi.org/10.1109/RFIC.2009.5135481
Publication status	Published - 8 Jun 2009
Event	2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009 - Boston Convention Center, Boston, United States Duration: 7 Jun 2009 → 9 Jun 2009

Conference

Conference	2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009
Abbreviated title	RFIC
Country/Territory	United States
City	Boston
Period	7/06/09 → 9/06/09

Keywords

Matching
— CMOS
EWI-16482
sampling receiver
Cognitive Radio
Distortion
Sampling
Nonlinearity
LC filter
LNA
downconverter
Software Defined Radio
tunable filter
harmonic rejection
IR-69823
CMOS
receiver
METIS-265236

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10.1109/RFIC.2009.5135481

Ru._Z._RFIC2009Final published version, 291 KB

Cite this

@inproceedings{6dcc2fa38fa04128b9c8688d5ee64fa1,

title = "A Tunable 300-800MHz RF-Sampling Receiver Achieving 60dB Harmonic Rejection and 0.8dB Minimum NF in 65nm CMOS",

abstract = "A 300-800MHz CMOS radio receiver aiming at software-defined radio is proposed. It exploits an LNA preceded by a tunable LC filter with one external coil to achieve voltage amplification for low NF and low-pass filtering to improve the 3rd and 5th harmonic rejection of an RF-sampling receiver to >60dB. The balun-LNA provides partial IM3 compensation, to drive a wideband sampling downconverter. The measured gain is 22-28dB while NF ranges from 0.8-4.3dB. The core consumes 6mW and clock takes 12mW.",

keywords = "Matching, — CMOS, EWI-16482, sampling receiver, Cognitive Radio, Distortion, Sampling, Nonlinearity, LC filter, LNA, downconverter, Software Defined Radio, tunable filter, harmonic rejection, IR-69823, CMOS, receiver, METIS-265236",

author = "Z. Ru and Klumperink, {Eric A.M.} and C. Saavedra and Bram Nauta",

year = "2009",

month = jun,

day = "8",

doi = "10.1109/RFIC.2009.5135481",

language = "English",

isbn = "978-1-4244-3376-6",

pages = "21--24",

booktitle = "Proceedings of the Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009.",

publisher = "IEEE",

address = "United States",

note = "2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009, RFIC ; Conference date: 07-06-2009 Through 09-06-2009",

}

Ru, Z, Klumperink, EAM, Saavedra, C & Nauta, B 2009, A Tunable 300-800MHz RF-Sampling Receiver Achieving 60dB Harmonic Rejection and 0.8dB Minimum NF in 65nm CMOS. in Proceedings of the Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009.. IEEE, Piscataway, pp. 21-24, 2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009, Boston, Massachusetts, United States, 7/06/09. https://doi.org/10.1109/RFIC.2009.5135481

A Tunable 300-800MHz RF-Sampling Receiver Achieving 60dB Harmonic Rejection and 0.8dB Minimum NF in 65nm CMOS. / Ru, Z.; Klumperink, Eric A.M.; Saavedra, C. et al.
Proceedings of the Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009.. Piscataway: IEEE, 2009. p. 21-24.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - Nauta, Bram

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N2 - A 300-800MHz CMOS radio receiver aiming at software-defined radio is proposed. It exploits an LNA preceded by a tunable LC filter with one external coil to achieve voltage amplification for low NF and low-pass filtering to improve the 3rd and 5th harmonic rejection of an RF-sampling receiver to >60dB. The balun-LNA provides partial IM3 compensation, to drive a wideband sampling downconverter. The measured gain is 22-28dB while NF ranges from 0.8-4.3dB. The core consumes 6mW and clock takes 12mW.

AB - A 300-800MHz CMOS radio receiver aiming at software-defined radio is proposed. It exploits an LNA preceded by a tunable LC filter with one external coil to achieve voltage amplification for low NF and low-pass filtering to improve the 3rd and 5th harmonic rejection of an RF-sampling receiver to >60dB. The balun-LNA provides partial IM3 compensation, to drive a wideband sampling downconverter. The measured gain is 22-28dB while NF ranges from 0.8-4.3dB. The core consumes 6mW and clock takes 12mW.

KW - Matching

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KW - EWI-16482

KW - sampling receiver

KW - Cognitive Radio

KW - Distortion

KW - Sampling

KW - Nonlinearity

KW - LC filter

KW - LNA

KW - downconverter

KW - Software Defined Radio

KW - tunable filter

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KW - receiver

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BT - Proceedings of the Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009.

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CY - Piscataway

T2 - 2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009

Y2 - 7 June 2009 through 9 June 2009

ER -

A Tunable 300-800MHz RF-Sampling Receiver Achieving 60dB Harmonic Rejection and 0.8dB Minimum NF in 65nm CMOS

Abstract

Conference

Keywords

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